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From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: qemu-devel@nongnu.org, peter.maydell@linaro.org
Cc: edgar.iglesias@xilinx.com, serge.fdrv@gmail.com,
	alex.bennee@linaro.org, agraf@suse.de, greg.bellows@linaro.org
Subject: [Qemu-devel] [PATCH v1 12/18] target-arm: Add TLBI_VAE2{IS}
Date: Wed, 13 May 2015 16:52:37 +1000	[thread overview]
Message-ID: <1431499963-1019-13-git-send-email-edgar.iglesias@gmail.com> (raw)
In-Reply-To: <1431499963-1019-1-git-send-email-edgar.iglesias@gmail.com>

From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 target-arm/helper.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/target-arm/helper.c b/target-arm/helper.c
index d57e0af..7ad9133 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2644,6 +2644,14 @@ static const ARMCPRegInfo v8_el2_cp_reginfo[] = {
       .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 7, .opc2 = 0,
       .type = ARM_CP_NO_RAW, .access = PL2_W,
       .writefn = tlbiall_write },
+    { .name = "TLBI_VAE2", .state = ARM_CP_STATE_AA64,
+      .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 7, .opc2 = 1,
+      .type = ARM_CP_NO_RAW, .access = PL2_W,
+      .writefn = tlbi_aa64_vaa_write },
+    { .name = "TLBI_VAE2IS", .state = ARM_CP_STATE_AA64,
+      .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 3, .opc2 = 1,
+      .type = ARM_CP_NO_RAW, .access = PL2_W,
+      .writefn = tlbi_aa64_vaa_write },
     { .name = "TPIDR_EL2", .state = ARM_CP_STATE_AA64,
       .opc0 = 3, .opc1 = 4, .opc2 = 2, .crn = 13, .crm = 0,
       .access = PL2_RW, .resetvalue = 0,
-- 
1.9.1

  parent reply	other threads:[~2015-05-13  7:03 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-13  6:52 [Qemu-devel] [PATCH v1 00/18] arm: Steps towards EL2 support round 3 Edgar E. Iglesias
2015-05-13  6:52 ` [Qemu-devel] [PATCH v1 01/18] target-arm: Correct accessfn for CNTP_{CT}VAL_EL0 Edgar E. Iglesias
2015-05-13  6:52 ` [Qemu-devel] [PATCH v1 02/18] target-arm: Correct accessfn for CNTV_TVAL_EL0 Edgar E. Iglesias
2015-05-13  6:52 ` [Qemu-devel] [PATCH v1 03/18] target-arm: Remove unneeded '+' Edgar E. Iglesias
2015-05-14  9:11   ` Alex Bennée
2015-05-13  6:52 ` [Qemu-devel] [PATCH v1 04/18] target-arm: Route timer access traps to EL1 Edgar E. Iglesias
2015-05-18 18:41   ` Peter Maydell
2015-05-18 23:27     ` Edgar E. Iglesias
2015-05-13  6:52 ` [Qemu-devel] [PATCH v1 05/18] target-arm: Add MAIR_EL2 Edgar E. Iglesias
2015-05-13  7:52   ` Sergey Fedorov
2015-05-13 11:05     ` Edgar E. Iglesias
2015-05-13 11:09       ` Sergey Fedorov
2015-05-18 18:49   ` Peter Maydell
2015-05-13  6:52 ` [Qemu-devel] [PATCH v1 06/18] target-arm: Add TCR_EL2 Edgar E. Iglesias
2015-05-18 18:51   ` Peter Maydell
2015-05-13  6:52 ` [Qemu-devel] [PATCH v1 07/18] target-arm: Add SCTLR_EL2 Edgar E. Iglesias
2015-05-13  6:52 ` [Qemu-devel] [PATCH v1 08/18] target-arm: Add TTBR0_EL2 Edgar E. Iglesias
2015-05-13  6:52 ` [Qemu-devel] [PATCH v1 09/18] target-arm: Add TLBI_ALLE1{IS} Edgar E. Iglesias
2015-05-13  6:52 ` [Qemu-devel] [PATCH v1 10/18] target-arm: Add TLBIALLE2 Edgar E. Iglesias
2015-05-13  6:52 ` [Qemu-devel] [PATCH v1 11/18] target-arm: Add TPIDR_EL2 Edgar E. Iglesias
2015-05-13  6:52 ` Edgar E. Iglesias [this message]
2015-05-13  6:52 ` [Qemu-devel] [PATCH v1 13/18] target-arm: Add access to PAR_EL1 Edgar E. Iglesias
2015-05-13  6:52 ` [Qemu-devel] [PATCH v1 14/18] target-arm: Add CNTVOFF_EL2 Edgar E. Iglesias
2015-05-13  6:52 ` [Qemu-devel] [PATCH v1 15/18] target-arm: Add CNTHCTL_EL2 Edgar E. Iglesias
2015-05-13  6:52 ` [Qemu-devel] [PATCH v1 16/18] target-arm: Pass timeridx as argument to various timer functions Edgar E. Iglesias
2015-05-13  6:52 ` [Qemu-devel] [PATCH v1 17/18] target-arm: Add HYP timer Edgar E. Iglesias
2015-05-13  6:52 ` [Qemu-devel] [PATCH v1 18/18] hw/arm/virt: Connect the Hypervisor timer Edgar E. Iglesias
2015-05-18 18:53 ` [Qemu-devel] [PATCH v1 00/18] arm: Steps towards EL2 support round 3 Peter Maydell
2015-05-18 23:38   ` Edgar E. Iglesias

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