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From: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
To: qemu-devel@nongnu.org
Cc: rth@twiddle.net
Subject: [Qemu-devel] [PATCH 01/10] target-tricore: Add ISA v1.3.1 cpu and fix tc1796 to using v1.3
Date: Wed, 13 May 2015 11:45:02 +0200	[thread overview]
Message-ID: <1431510311-13355-2-git-send-email-kbastian@mail.uni-paderborn.de> (raw)
In-Reply-To: <1431510311-13355-1-git-send-email-kbastian@mail.uni-paderborn.de>

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
---
 target-tricore/cpu.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/target-tricore/cpu.c b/target-tricore/cpu.c
index 2ba0cf4..9fe0b97 100644
--- a/target-tricore/cpu.c
+++ b/target-tricore/cpu.c
@@ -118,6 +118,13 @@ static void tc1796_initfn(Object *obj)
 {
     TriCoreCPU *cpu = TRICORE_CPU(obj);
 
+    set_feature(&cpu->env, TRICORE_FEATURE_13);
+}
+
+static void tc1797_initfn(Object *obj)
+{
+    TriCoreCPU *cpu = TRICORE_CPU(obj);
+
     set_feature(&cpu->env, TRICORE_FEATURE_131);
 }
 
@@ -136,6 +143,7 @@ typedef struct TriCoreCPUInfo {
 
 static const TriCoreCPUInfo tricore_cpus[] = {
     { .name = "tc1796",      .initfn = tc1796_initfn },
+    { .name = "tc1797",      .initfn = tc1797_initfn },
     { .name = "aurix",       .initfn = aurix_initfn },
     { .name = NULL }
 };
-- 
2.4.0

  reply	other threads:[~2015-05-13  9:45 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-13  9:45 [Qemu-devel] [PATCH 00/10] TriCore v1.6.1 ISA and missing v1.6 instructions Bastian Koppelmann
2015-05-13  9:45 ` Bastian Koppelmann [this message]
2015-05-21 17:19   ` [Qemu-devel] [PATCH 01/10] target-tricore: Add ISA v1.3.1 cpu and fix tc1796 to using v1.3 Richard Henderson
2015-05-13  9:45 ` [Qemu-devel] [PATCH 02/10] target-tricore: introduce ISA v1.6.1 feature Bastian Koppelmann
2015-05-21 17:19   ` Richard Henderson
2015-05-13  9:45 ` [Qemu-devel] [PATCH 03/10] target-tricore: Add SRC_MOV_E instruction of the v1.6 ISA Bastian Koppelmann
2015-05-21 17:20   ` Richard Henderson
2015-05-13  9:45 ` [Qemu-devel] [PATCH 04/10] target-tricore: add CMPSWP instructions of the v1.6.1 ISA Bastian Koppelmann
2015-05-21 17:22   ` Richard Henderson
2015-05-22  8:07     ` Bastian Koppelmann
2015-05-13  9:45 ` [Qemu-devel] [PATCH 05/10] target-tricore: add SWAPMSK " Bastian Koppelmann
2015-05-21 17:22   ` Richard Henderson
2015-05-13  9:45 ` [Qemu-devel] [PATCH 06/10] target-tricore: add RR_CRC32 instruction " Bastian Koppelmann
2015-05-21 17:25   ` Richard Henderson
2015-05-13  9:45 ` [Qemu-devel] [PATCH 07/10] target-tricore: add SYS_RESTORE instruction of the v1.6 ISA Bastian Koppelmann
2015-05-21 17:27   ` Richard Henderson
2015-05-13  9:45 ` [Qemu-devel] [PATCH 08/10] target-tricore: add FCALL instructions " Bastian Koppelmann
2015-05-21 17:28   ` Richard Henderson
2015-05-22  8:08     ` Bastian Koppelmann
2015-05-13  9:45 ` [Qemu-devel] [PATCH 09/10] target-tricore: add FRET " Bastian Koppelmann
2015-05-21 17:29   ` Richard Henderson
2015-05-13  9:45 ` [Qemu-devel] [PATCH 10/10] target-tricore: add RR_DIV and RR_DIV_U " Bastian Koppelmann
2015-05-21 17:29   ` Richard Henderson
2015-05-21 15:28 ` [Qemu-devel] [PATCH 00/10] TriCore v1.6.1 ISA and missing v1.6 instructions Bastian Koppelmann

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