From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42950) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YsYlX-0004Vq-LF for qemu-devel@nongnu.org; Wed, 13 May 2015 11:40:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YsYlS-0003uP-QQ for qemu-devel@nongnu.org; Wed, 13 May 2015 11:40:11 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:35937) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YsYlS-0003tH-Kb for qemu-devel@nongnu.org; Wed, 13 May 2015 11:40:06 -0400 From: Yongbok Kim Date: Wed, 13 May 2015 16:37:35 +0100 Message-ID: <1431531457-17127-1-git-send-email-yongbok.kim@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v3 0/2] target-mips: Add support for misaligned accesses List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, leon.alrae@imgtec.com, afaerber@suse.de, rth@twiddle.net This patch set adds support for misaligned memory accesses in MIPS archit= ecture Release 6 and MIPS SIMD Architecture. The behaviour, semantics, and architecture specifications of misaligned m= emory accesses are described in: MIPS Architecture For Programmers Volume I-A: Introduction to the MIPS64 Architecture, Appendix B Misaligned Memory Accesses. Available at http://www.imgtec.com/mips/architectures/mips64.asp Regards, Yongbok v3: * Rewrote MSA patch * Work-around is using byte-to-byte accesses and endianness corrections f= or=20 R5+MSA. (This replaces the misaligned flag from v2.) (Leon) * Bug fixes (Leon) * Separate helper functions for each data formats v2: * Removed re-translation in the mips_cpu_do_unaligned_access() (Peter) * Checks validity only if an access is spanning into two pages in MSA (Le= on) * Introduced misaligned flag to indicate MSA ld/st is ongoing, is used to allow misaligned accesses in the mips_cpu_do_unaligned_access() callbac= k. This is crucial to support MSA misaligned accesses in Release 5 cores. Yongbok Kim (2): target-mips: Misaligned memory accesses for R6 target-mips: Misaligned memory accesses for MSA target-mips/helper.h | 10 ++- target-mips/op_helper.c | 149 ++++++++++++++++++++++++------------= ----- target-mips/translate.c | 23 +++++-- target-mips/translate_init.c | 2 +- 4 files changed, 112 insertions(+), 72 deletions(-) --=20 1.7.5.4