From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 15/21] linux-user/arm: Correct TARGET_NR_timerfd to TARGET_NR_timerfd_create
Date: Mon, 18 May 2015 20:15:15 +0100 [thread overview]
Message-ID: <1431976521-30352-16-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1431976521-30352-1-git-send-email-peter.maydell@linaro.org>
From: Timothy Baldwin <T.E.Baldwin99@members.leeds.ac.uk>
Misspelled system call name in macro was causing timerfd_create not
to be supported for the ARM target.
Signed-off-by: Timothy Edward Baldwin <T.E.Baldwin99@members.leeds.ac.uk>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
linux-user/arm/syscall_nr.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/linux-user/arm/syscall_nr.h b/linux-user/arm/syscall_nr.h
index 7d7be7c..53552be 100644
--- a/linux-user/arm/syscall_nr.h
+++ b/linux-user/arm/syscall_nr.h
@@ -354,7 +354,7 @@
#define TARGET_NR_kexec_load (347)
#define TARGET_NR_utimensat (348)
#define TARGET_NR_signalfd (349)
-#define TARGET_NR_timerfd (350)
+#define TARGET_NR_timerfd_create (350)
#define TARGET_NR_eventfd (351)
#define TARGET_NR_fallocate (352)
#define TARGET_NR_timerfd_settime (353)
--
1.9.1
next prev parent reply other threads:[~2015-05-18 19:15 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-18 19:15 [Qemu-devel] [PULL 00/21] target-arm queue Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 01/21] target-arm: cpu64: generalise name of A57 regs Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 02/21] target-arm: cpu64: Add support for Cortex-A53 Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 03/21] arm: Introduce Xilinx ZynqMP SoC Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 04/21] arm: xlnx-zynqmp: Add GIC Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 05/21] arm: xlnx-zynqmp: Connect CPU Timers to GIC Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 06/21] net: cadence_gem: Clean up variable names Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 07/21] net: cadence_gem: Split state struct and type into header Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 08/21] arm: xlnx-zynqmp: Add GEM support Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 09/21] char: cadence_uart: Clean up variable names Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 10/21] char: cadence_uart: Split state struct and type into header Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 11/21] arm: xlnx-zynqmp: Add UART support Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 12/21] arm: Add xlnx-ep108 machine Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 13/21] arm: xlnx-ep108: Add external RAM Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 14/21] arm: xlnx-ep108: Add bootloading Peter Maydell
2015-05-18 19:15 ` Peter Maydell [this message]
2015-05-18 19:15 ` [Qemu-devel] [PULL 16/21] target-arm: Add TTBR regime function and use Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 17/21] target-arm: Add EL3 and EL2 TCR checking Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 18/21] target-arm: Add WFx syndrome function Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 19/21] target-arm: Correct accessfn for CNTP_{CT}VAL_EL0 Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 20/21] target-arm: Correct accessfn for CNTV_TVAL_EL0 Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 21/21] target-arm: Remove unneeded '+' Peter Maydell
2015-05-19 7:57 ` [Qemu-devel] [PULL 00/21] target-arm queue Peter Maydell
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