From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 21/21] target-arm: Remove unneeded '+'
Date: Mon, 18 May 2015 20:15:21 +0100 [thread overview]
Message-ID: <1431976521-30352-22-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1431976521-30352-1-git-send-email-peter.maydell@linaro.org>
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 1431499963-1019-4-git-send-email-edgar.iglesias@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 21b4531..5d0f011 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -1249,7 +1249,7 @@ static void gt_tval_write(CPUARMState *env, const ARMCPRegInfo *ri,
int timeridx = ri->crm & 1;
env->cp15.c14_timer[timeridx].cval = gt_get_countervalue(env) +
- + sextract64(value, 0, 32);
+ sextract64(value, 0, 32);
gt_recalc_timer(arm_env_get_cpu(env), timeridx);
}
--
1.9.1
next prev parent reply other threads:[~2015-05-18 19:15 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-18 19:15 [Qemu-devel] [PULL 00/21] target-arm queue Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 01/21] target-arm: cpu64: generalise name of A57 regs Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 02/21] target-arm: cpu64: Add support for Cortex-A53 Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 03/21] arm: Introduce Xilinx ZynqMP SoC Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 04/21] arm: xlnx-zynqmp: Add GIC Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 05/21] arm: xlnx-zynqmp: Connect CPU Timers to GIC Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 06/21] net: cadence_gem: Clean up variable names Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 07/21] net: cadence_gem: Split state struct and type into header Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 08/21] arm: xlnx-zynqmp: Add GEM support Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 09/21] char: cadence_uart: Clean up variable names Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 10/21] char: cadence_uart: Split state struct and type into header Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 11/21] arm: xlnx-zynqmp: Add UART support Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 12/21] arm: Add xlnx-ep108 machine Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 13/21] arm: xlnx-ep108: Add external RAM Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 14/21] arm: xlnx-ep108: Add bootloading Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 15/21] linux-user/arm: Correct TARGET_NR_timerfd to TARGET_NR_timerfd_create Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 16/21] target-arm: Add TTBR regime function and use Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 17/21] target-arm: Add EL3 and EL2 TCR checking Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 18/21] target-arm: Add WFx syndrome function Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 19/21] target-arm: Correct accessfn for CNTP_{CT}VAL_EL0 Peter Maydell
2015-05-18 19:15 ` [Qemu-devel] [PULL 20/21] target-arm: Correct accessfn for CNTV_TVAL_EL0 Peter Maydell
2015-05-18 19:15 ` Peter Maydell [this message]
2015-05-19 7:57 ` [Qemu-devel] [PULL 00/21] target-arm queue Peter Maydell
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