From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Cc: edgar.iglesias@xilinx.com, serge.fdrv@gmail.com,
alex.bennee@linaro.org, agraf@suse.de, patches@linaro.org
Subject: [Qemu-devel] [PATCH 02/14] target-arm: Extend helpers to route exceptions
Date: Tue, 19 May 2015 19:33:22 +0100 [thread overview]
Message-ID: <1432060414-5195-3-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1432060414-5195-1-git-send-email-peter.maydell@linaro.org>
From: Greg Bellows <greg.bellows@linaro.org>
Updated the various helper routines to set the target EL as needed using a
dedicated function.
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1429722561-12651-3-git-send-email-greg.bellows@linaro.org
[PMM: Also set target_el in fault cases in access_check_cp_reg()]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/op_helper.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index 51b04bd..43e3457 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -33,6 +33,20 @@ static void raise_exception(CPUARMState *env, int tt)
cpu_loop_exit(cs);
}
+static int exception_target_el(CPUARMState *env)
+{
+ int target_el = MAX(1, arm_current_el(env));
+
+ /* No such thing as secure EL1 if EL3 is aarch32, so update the target EL
+ * to EL3 in this case.
+ */
+ if (arm_is_secure(env) && !arm_el_is_aa64(env, 3) && target_el == 1) {
+ target_el = 3;
+ }
+
+ return target_el;
+}
+
uint32_t HELPER(neon_tbl)(CPUARMState *env, uint32_t ireg, uint32_t def,
uint32_t rn, uint32_t maxindex)
{
@@ -306,6 +320,7 @@ void HELPER(access_check_cp_reg)(CPUARMState *env, void *rip, uint32_t syndrome)
if (arm_feature(env, ARM_FEATURE_XSCALE) && ri->cp < 14
&& extract32(env->cp15.c15_cpar, ri->cp, 1) == 0) {
env->exception.syndrome = syndrome;
+ env->exception.target_el = exception_target_el(env);
raise_exception(env, EXCP_UDEF);
}
@@ -318,9 +333,11 @@ void HELPER(access_check_cp_reg)(CPUARMState *env, void *rip, uint32_t syndrome)
return;
case CP_ACCESS_TRAP:
env->exception.syndrome = syndrome;
+ env->exception.target_el = exception_target_el(env);
break;
case CP_ACCESS_TRAP_UNCATEGORIZED:
env->exception.syndrome = syn_uncategorized();
+ env->exception.target_el = exception_target_el(env);
break;
default:
g_assert_not_reached();
@@ -363,6 +380,7 @@ void HELPER(msr_i_pstate)(CPUARMState *env, uint32_t op, uint32_t imm)
* to catch that case at translate time.
*/
if (arm_current_el(env) == 0 && !(env->cp15.sctlr_el[1] & SCTLR_UMA)) {
+ env->exception.target_el = exception_target_el(env);
raise_exception(env, EXCP_UDEF);
}
@@ -422,6 +440,7 @@ void HELPER(pre_hvc)(CPUARMState *env)
if (undef) {
env->exception.syndrome = syn_uncategorized();
+ env->exception.target_el = exception_target_el(env);
raise_exception(env, EXCP_UDEF);
}
}
@@ -452,11 +471,13 @@ void HELPER(pre_smc)(CPUARMState *env, uint32_t syndrome)
} else if (!secure && cur_el == 1 && (env->cp15.hcr_el2 & HCR_TSC)) {
/* In NS EL1, HCR controlled routing to EL2 has priority over SMD. */
env->exception.syndrome = syndrome;
+ env->exception.target_el = 2;
raise_exception(env, EXCP_HYP_TRAP);
}
if (undef) {
env->exception.syndrome = syn_uncategorized();
+ env->exception.target_el = exception_target_el(env);
raise_exception(env, EXCP_UDEF);
}
}
--
1.9.1
next prev parent reply other threads:[~2015-05-19 18:51 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-19 18:33 [Qemu-devel] [PATCH 00/14] Various EL3 support/cleanup patches Peter Maydell
2015-05-19 18:33 ` [Qemu-devel] [PATCH 01/14] target-arm: Add exception target el infrastructure Peter Maydell
2015-05-19 18:33 ` Peter Maydell [this message]
2015-05-19 18:33 ` [Qemu-devel] [PATCH 03/14] target-arm: Set correct syndrome for faults on MSR DAIF*, imm Peter Maydell
2015-05-28 5:30 ` Edgar E. Iglesias
2015-05-28 8:30 ` Peter Maydell
2015-05-28 11:40 ` Peter Maydell
2015-05-28 11:44 ` Edgar E. Iglesias
2015-05-28 11:54 ` Peter Maydell
2015-05-19 18:33 ` [Qemu-devel] [PATCH 04/14] target-arm: Move setting of exception info into tlb_fill Peter Maydell
2015-05-28 5:32 ` Edgar E. Iglesias
2015-05-19 18:33 ` [Qemu-devel] [PATCH 05/14] target-arm: Set exception target EL in tlb_fill Peter Maydell
2015-05-28 5:39 ` Edgar E. Iglesias
2015-05-19 18:33 ` [Qemu-devel] [PATCH 06/14] target-arm: Make raise_exception() take syndrome and target EL Peter Maydell
2015-05-28 5:42 ` Edgar E. Iglesias
2015-05-19 18:33 ` [Qemu-devel] [PATCH 07/14] target-arm: Update interrupt handling to use " Peter Maydell
2015-05-19 18:33 ` [Qemu-devel] [PATCH 08/14] target-arm: Allow cp access functions to indicate traps to EL2 or EL3 Peter Maydell
2015-05-21 5:47 ` Edgar E. Iglesias
2015-05-21 7:04 ` Peter Maydell
2015-05-28 11:48 ` Edgar E. Iglesias
2015-05-28 11:56 ` Peter Maydell
2015-05-19 18:33 ` [Qemu-devel] [PATCH 09/14] target-arm: Add AArch64 CPTR registers Peter Maydell
2015-05-28 12:12 ` Edgar E. Iglesias
2015-05-19 18:33 ` [Qemu-devel] [PATCH 10/14] target-arm: Make singlestate TB flags common between AArch32/64 Peter Maydell
2015-05-28 5:51 ` Edgar E. Iglesias
2015-05-19 18:33 ` [Qemu-devel] [PATCH 11/14] target-arm: Extend FP checks to use an EL Peter Maydell
2015-05-28 12:50 ` Edgar E. Iglesias
2015-05-28 13:19 ` Peter Maydell
2015-05-28 13:27 ` Edgar E. Iglesias
2015-05-28 14:48 ` Peter Maydell
2015-05-19 18:33 ` [Qemu-devel] [PATCH 12/14] target-arm: Move TB flags down to fill gap Peter Maydell
2015-05-28 5:53 ` Edgar E. Iglesias
2015-05-19 18:33 ` [Qemu-devel] [PATCH 13/14] target-arm: Don't halt on WFI unless we don't have any work Peter Maydell
2015-05-28 5:55 ` Edgar E. Iglesias
2015-05-19 18:33 ` [Qemu-devel] [PATCH 14/14] target-arm: Add WFx instruction trap support Peter Maydell
2015-05-28 5:59 ` Edgar E. Iglesias
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