From: Marcel Apfelbaum <marcel@redhat.com>
To: qemu-devel@nongnu.org
Cc: marcel@redhat.com, pbonzini@redhat.com, mst@redhat.com
Subject: [Qemu-devel] [PATCH V7 23/24] apci: fix PXB behaviour if used with unsupported BIOS
Date: Mon, 25 May 2015 18:34:01 +0300 [thread overview]
Message-ID: <1432568042-19553-24-git-send-email-marcel@redhat.com> (raw)
In-Reply-To: <1432568042-19553-1-git-send-email-marcel@redhat.com>
PXB does not work with unsupported bioses, but should
not interfere with normal OS operation.
We don't ship them anymore, but it's reasonable
to keep the work-around until we update the bios in qemu.
Fix this by not adding PXB mem/IO chunks to _CRS
if they weren't configured by BIOS.
Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>
---
hw/i386/acpi-build.c | 87 ++++++++++++++++++++++++++++++++++------------------
1 file changed, 58 insertions(+), 29 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index f7d2c80..895d64c 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -784,6 +784,14 @@ static Aml *build_crs(PCIHostState *host,
range_base = r->addr;
range_limit = r->addr + r->size - 1;
+ /*
+ * Work-around for old bioses
+ * that do not support multiple root buses
+ */
+ if (!range_base || range_base > range_limit) {
+ continue;
+ }
+
if (r->type & PCI_BASE_ADDRESS_SPACE_IO) {
aml_append(crs,
aml_word_io(aml_min_fixed, aml_max_fixed,
@@ -817,45 +825,66 @@ static Aml *build_crs(PCIHostState *host,
range_base = pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_IO);
range_limit = pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_IO);
- aml_append(crs,
- aml_word_io(aml_min_fixed, aml_max_fixed,
- aml_pos_decode, aml_entire_range,
- 0,
- range_base,
- range_limit,
- 0,
- range_limit - range_base + 1));
- crs_range_insert(io_ranges, range_base, range_limit);
+
+ /*
+ * Work-around for old bioses
+ * that do not support multiple root buses
+ */
+ if (range_base || range_base > range_limit) {
+ aml_append(crs,
+ aml_word_io(aml_min_fixed, aml_max_fixed,
+ aml_pos_decode, aml_entire_range,
+ 0,
+ range_base,
+ range_limit,
+ 0,
+ range_limit - range_base + 1));
+ crs_range_insert(io_ranges, range_base, range_limit);
+ }
range_base =
pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_MEMORY);
range_limit =
pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_MEMORY);
- aml_append(crs,
- aml_dword_memory(aml_pos_decode, aml_min_fixed,
- aml_max_fixed, aml_non_cacheable,
- aml_ReadWrite,
- 0,
- range_base,
- range_limit,
- 0,
- range_limit - range_base + 1));
- crs_range_insert(mem_ranges, range_base, range_limit);
+
+ /*
+ * Work-around for old bioses
+ * that do not support multiple root buses
+ */
+ if (range_base || range_base > range_limit) {
+ aml_append(crs,
+ aml_dword_memory(aml_pos_decode, aml_min_fixed,
+ aml_max_fixed, aml_non_cacheable,
+ aml_ReadWrite,
+ 0,
+ range_base,
+ range_limit,
+ 0,
+ range_limit - range_base + 1));
+ crs_range_insert(mem_ranges, range_base, range_limit);
+ }
range_base =
pci_bridge_get_base(dev, PCI_BASE_ADDRESS_MEM_PREFETCH);
range_limit =
pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_MEM_PREFETCH);
- aml_append(crs,
- aml_dword_memory(aml_pos_decode, aml_min_fixed,
- aml_max_fixed, aml_non_cacheable,
- aml_ReadWrite,
- 0,
- range_base,
- range_limit,
- 0,
- range_limit - range_base + 1));
- crs_range_insert(mem_ranges, range_base, range_limit);
+
+ /*
+ * Work-around for old bioses
+ * that do not support multiple root buses
+ */
+ if (range_base || range_base > range_limit) {
+ aml_append(crs,
+ aml_dword_memory(aml_pos_decode, aml_min_fixed,
+ aml_max_fixed, aml_non_cacheable,
+ aml_ReadWrite,
+ 0,
+ range_base,
+ range_limit,
+ 0,
+ range_limit - range_base + 1));
+ crs_range_insert(mem_ranges, range_base, range_limit);
+ }
}
}
--
2.1.0
next prev parent reply other threads:[~2015-05-25 15:35 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-25 15:33 [Qemu-devel] [PATCH V7 00/24] hw/pc: implement multiple primary busses for pc machines Marcel Apfelbaum
2015-05-25 15:33 ` [Qemu-devel] [PATCH V7 01/24] acpi: add aml_or() term Marcel Apfelbaum
2015-05-25 15:33 ` [Qemu-devel] [PATCH V7 02/24] acpi: add aml_add() term Marcel Apfelbaum
2015-05-26 6:09 ` Shannon Zhao
2015-05-25 15:33 ` [Qemu-devel] [PATCH V7 03/24] acpi: add aml_lless() term Marcel Apfelbaum
2015-05-25 15:33 ` [Qemu-devel] [PATCH V7 04/24] acpi: add aml_index() term Marcel Apfelbaum
2015-05-26 6:12 ` Shannon Zhao
2015-05-25 15:33 ` [Qemu-devel] [PATCH V7 05/24] acpi: add aml_shiftleft() term Marcel Apfelbaum
2015-05-26 6:15 ` Shannon Zhao
2015-05-25 15:33 ` [Qemu-devel] [PATCH V7 06/24] acpi: add aml_shiftright() term Marcel Apfelbaum
2015-05-26 6:16 ` Shannon Zhao
2015-05-25 15:33 ` [Qemu-devel] [PATCH V7 07/24] acpi: add aml_increment() term Marcel Apfelbaum
2015-05-25 15:33 ` [Qemu-devel] [PATCH V7 08/24] acpi: add aml_while() term Marcel Apfelbaum
2015-05-25 15:33 ` [Qemu-devel] [PATCH V7 09/24] hw/pci: made pci_bus_is_root a PCIBusClass method Marcel Apfelbaum
2015-05-25 15:33 ` [Qemu-devel] [PATCH V7 10/24] hw/pci: made pci_bus_num " Marcel Apfelbaum
2015-05-25 15:33 ` [Qemu-devel] [PATCH V7 11/24] hw/i386: query only for q35/pc when looking for pci host bridge Marcel Apfelbaum
2015-05-25 15:33 ` [Qemu-devel] [PATCH V7 12/24] hw/pci: extend PCI config access to support devices behind PXB Marcel Apfelbaum
2015-05-25 15:33 ` [Qemu-devel] [PATCH V7 13/24] hw/acpi: add support for i440fx 'snooping' root busses Marcel Apfelbaum
2015-05-25 15:33 ` [Qemu-devel] [PATCH V7 14/24] hw/apci: add _PRT method for extra PCI " Marcel Apfelbaum
2015-05-25 15:33 ` [Qemu-devel] [PATCH V7 15/24] hw/acpi: add _CRS method for extra " Marcel Apfelbaum
2015-05-25 15:33 ` [Qemu-devel] [PATCH V7 16/24] hw/acpi: remove from root bus 0 the crs resources used by other buses Marcel Apfelbaum
2015-05-25 15:33 ` [Qemu-devel] [PATCH V7 17/24] hw/pci: removed 'rootbus nr is 0' assumption from qmp_pci_query Marcel Apfelbaum
2015-05-25 15:33 ` [Qemu-devel] [PATCH V7 18/24] hw/pci: introduce PCI Expander Bridge (PXB) Marcel Apfelbaum
2015-05-25 15:33 ` [Qemu-devel] [PATCH V7 19/24] hw/pci: inform bios if the system has extra pci root buses Marcel Apfelbaum
2015-05-25 15:33 ` [Qemu-devel] [PATCH V7 20/24] hw/pxb: add map_irq func Marcel Apfelbaum
2015-05-25 15:33 ` [Qemu-devel] [PATCH V7 21/24] hw/pci: add support for NUMA nodes Marcel Apfelbaum
2015-05-25 15:34 ` [Qemu-devel] [PATCH V7 22/24] hw/pxb: add numa_node parameter Marcel Apfelbaum
2015-05-25 15:34 ` Marcel Apfelbaum [this message]
2015-05-31 18:12 ` [Qemu-devel] [PATCH V7 23/24] apci: fix PXB behaviour if used with unsupported BIOS Michael S. Tsirkin
2015-06-01 9:44 ` Marcel Apfelbaum
2015-06-01 11:40 ` Gerd Hoffmann
2015-06-01 12:17 ` Michael S. Tsirkin
2015-06-01 12:21 ` Marcel Apfelbaum
2015-06-01 12:27 ` Michael S. Tsirkin
2015-06-01 13:05 ` Marcel Apfelbaum
2015-06-01 13:28 ` Laszlo Ersek
2015-06-01 13:48 ` Marcel Apfelbaum
2015-06-01 15:37 ` Laszlo Ersek
2015-06-02 11:37 ` Marcel Apfelbaum
2015-06-02 15:24 ` Laszlo Ersek
2015-06-02 15:51 ` Marcel Apfelbaum
2015-06-01 12:24 ` Gerd Hoffmann
2015-06-01 12:27 ` Michael S. Tsirkin
2015-06-01 12:57 ` Gerd Hoffmann
2015-06-01 13:26 ` Michael S. Tsirkin
2015-05-25 15:34 ` [Qemu-devel] [PATCH V7 24/24] docs: Add PXB documentation Marcel Apfelbaum
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1432568042-19553-24-git-send-email-marcel@redhat.com \
--to=marcel@redhat.com \
--cc=mst@redhat.com \
--cc=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).