From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46278) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YxVrF-0002gT-Bc for qemu-devel@nongnu.org; Wed, 27 May 2015 03:34:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YxVrC-0005ty-4O for qemu-devel@nongnu.org; Wed, 27 May 2015 03:34:33 -0400 Received: from mail-oi0-x22c.google.com ([2607:f8b0:4003:c06::22c]:35307) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YxVrB-0005tg-Tr for qemu-devel@nongnu.org; Wed, 27 May 2015 03:34:30 -0400 Received: by oihd6 with SMTP id d6so1175826oih.2 for ; Wed, 27 May 2015 00:34:29 -0700 (PDT) From: "Edgar E. Iglesias" Date: Wed, 27 May 2015 17:27:29 +1000 Message-Id: <1432711659-24591-5-git-send-email-edgar.iglesias@gmail.com> In-Reply-To: <1432711659-24591-1-git-send-email-edgar.iglesias@gmail.com> References: <1432711659-24591-1-git-send-email-edgar.iglesias@gmail.com> Subject: [Qemu-devel] [PATCH v2 04/14] target-arm: Add SCTLR_EL2 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: edgar.iglesias@xilinx.com, serge.fdrv@gmail.com, alex.bennee@linaro.org, agraf@suse.de, greg.bellows@linaro.org From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias --- target-arm/helper.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/target-arm/helper.c b/target-arm/helper.c index 7dadc8a..334e008 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2527,6 +2527,9 @@ static const ARMCPRegInfo v8_el3_no_el2_cp_reginfo[] = { { .name = "TCR_EL2", .state = ARM_CP_STATE_BOTH, .opc0 = 3, .opc1 = 4, .crn = 2, .crm = 0, .opc2 = 2, .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 }, + { .name = "SCTLR_EL2", .state = ARM_CP_STATE_BOTH, + .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 0, .opc2 = 0, + .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 }, REGINFO_SENTINEL }; @@ -2611,6 +2614,10 @@ static const ARMCPRegInfo v8_el2_cp_reginfo[] = { .access = PL2_RW, .writefn = vmsa_tcr_el1_write, .resetfn = vmsa_ttbcr_reset, .raw_writefn = raw_write, .fieldoffset = offsetof(CPUARMState, cp15.tcr_el[2]) }, + { .name = "SCTLR_EL2", .state = ARM_CP_STATE_BOTH, + .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 0, .opc2 = 0, + .access = PL2_RW, .raw_writefn = raw_write, .writefn = sctlr_write, + .fieldoffset = offsetof(CPUARMState, cp15.sctlr_el[2]) }, REGINFO_SENTINEL }; -- 1.9.1