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From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: qemu-devel@nongnu.org, peter.maydell@linaro.org
Cc: edgar.iglesias@xilinx.com, serge.fdrv@gmail.com,
	alex.bennee@linaro.org, agraf@suse.de, greg.bellows@linaro.org
Subject: [Qemu-devel] [PATCH v2 05/14] target-arm: Add TPIDR_EL2
Date: Wed, 27 May 2015 17:27:30 +1000	[thread overview]
Message-ID: <1432711659-24591-6-git-send-email-edgar.iglesias@gmail.com> (raw)
In-Reply-To: <1432711659-24591-1-git-send-email-edgar.iglesias@gmail.com>

From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 target-arm/helper.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/target-arm/helper.c b/target-arm/helper.c
index 334e008..df07a6a 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2530,6 +2530,9 @@ static const ARMCPRegInfo v8_el3_no_el2_cp_reginfo[] = {
     { .name = "SCTLR_EL2", .state = ARM_CP_STATE_BOTH,
       .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 0, .opc2 = 0,
       .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
+    { .name = "TPIDR_EL2", .state = ARM_CP_STATE_BOTH,
+      .opc0 = 3, .opc1 = 4, .opc2 = 2, .crn = 13, .crm = 0,
+      .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
     REGINFO_SENTINEL
 };
 
@@ -2618,6 +2621,10 @@ static const ARMCPRegInfo v8_el2_cp_reginfo[] = {
       .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 0, .opc2 = 0,
       .access = PL2_RW, .raw_writefn = raw_write, .writefn = sctlr_write,
       .fieldoffset = offsetof(CPUARMState, cp15.sctlr_el[2]) },
+    { .name = "TPIDR_EL2", .state = ARM_CP_STATE_BOTH,
+      .opc0 = 3, .opc1 = 4, .opc2 = 2, .crn = 13, .crm = 0,
+      .access = PL2_RW, .resetvalue = 0,
+      .fieldoffset = offsetof(CPUARMState, cp15.tpidr_el[2]) },
     REGINFO_SENTINEL
 };
 
-- 
1.9.1

  parent reply	other threads:[~2015-05-27  7:35 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-27  7:27 [Qemu-devel] [PATCH v2 00/14] arm: Steps towards EL2 support round 3 Edgar E. Iglesias
2015-05-27  7:27 ` [Qemu-devel] [PATCH v2 01/14] target-arm: Break down TLB_LOCKDOWN Edgar E. Iglesias
2015-05-27  7:27 ` [Qemu-devel] [PATCH v2 02/14] target-arm: Add MAIR_EL2 Edgar E. Iglesias
2015-05-27  7:27 ` [Qemu-devel] [PATCH v2 03/14] target-arm: Add TCR_EL2 Edgar E. Iglesias
2015-05-27  7:27 ` [Qemu-devel] [PATCH v2 04/14] target-arm: Add SCTLR_EL2 Edgar E. Iglesias
2015-05-27  7:27 ` Edgar E. Iglesias [this message]
2015-05-27  7:27 ` [Qemu-devel] [PATCH v2 06/14] target-arm: Add TTBR0_EL2 Edgar E. Iglesias
2015-05-27  7:27 ` [Qemu-devel] [PATCH v2 07/14] target-arm: Add TLBI_ALLE1{IS} Edgar E. Iglesias
2015-05-27  7:27 ` [Qemu-devel] [PATCH v2 08/14] target-arm: Add TLBI_ALLE2 Edgar E. Iglesias
2015-05-27  7:27 ` [Qemu-devel] [PATCH v2 09/14] target-arm: Add TLBI_VAE2{IS} Edgar E. Iglesias
2015-05-27  7:27 ` [Qemu-devel] [PATCH v2 10/14] target-arm: Add CNTVOFF_EL2 Edgar E. Iglesias
2015-05-27  7:27 ` [Qemu-devel] [PATCH v2 11/14] target-arm: Add CNTHCTL_EL2 Edgar E. Iglesias
2015-05-28  5:38   ` Edgar E. Iglesias
2015-05-27  7:27 ` [Qemu-devel] [PATCH v2 12/14] target-arm: Pass timeridx as argument to various timer functions Edgar E. Iglesias
2015-05-27  7:27 ` [Qemu-devel] [PATCH v2 13/14] target-arm: Add HYP timer Edgar E. Iglesias
2015-05-27  7:27 ` [Qemu-devel] [PATCH v2 14/14] hw/arm/virt: Connect the Hypervisor timer Edgar E. Iglesias

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