From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58524) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YyE8B-00034I-E4 for qemu-devel@nongnu.org; Fri, 29 May 2015 02:51:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YyE87-00026R-Ho for qemu-devel@nongnu.org; Fri, 29 May 2015 02:50:59 -0400 Received: from mail-pa0-x22b.google.com ([2607:f8b0:400e:c03::22b]:34933) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YyE87-000262-6r for qemu-devel@nongnu.org; Fri, 29 May 2015 02:50:55 -0400 Received: by pacwv17 with SMTP id wv17so46030019pac.2 for ; Thu, 28 May 2015 23:50:54 -0700 (PDT) From: "Edgar E. Iglesias" Date: Fri, 29 May 2015 16:43:17 +1000 Message-Id: <1432881807-18164-6-git-send-email-edgar.iglesias@gmail.com> In-Reply-To: <1432881807-18164-1-git-send-email-edgar.iglesias@gmail.com> References: <1432881807-18164-1-git-send-email-edgar.iglesias@gmail.com> Subject: [Qemu-devel] [PATCH v3 05/15] target-arm: Add SCTLR_EL2 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: edgar.iglesias@xilinx.com, serge.fdrv@gmail.com, alex.bennee@linaro.org, agraf@suse.de From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias --- target-arm/helper.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/target-arm/helper.c b/target-arm/helper.c index 7dadc8a..334e008 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2527,6 +2527,9 @@ static const ARMCPRegInfo v8_el3_no_el2_cp_reginfo[] = { { .name = "TCR_EL2", .state = ARM_CP_STATE_BOTH, .opc0 = 3, .opc1 = 4, .crn = 2, .crm = 0, .opc2 = 2, .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 }, + { .name = "SCTLR_EL2", .state = ARM_CP_STATE_BOTH, + .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 0, .opc2 = 0, + .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 }, REGINFO_SENTINEL }; @@ -2611,6 +2614,10 @@ static const ARMCPRegInfo v8_el2_cp_reginfo[] = { .access = PL2_RW, .writefn = vmsa_tcr_el1_write, .resetfn = vmsa_ttbcr_reset, .raw_writefn = raw_write, .fieldoffset = offsetof(CPUARMState, cp15.tcr_el[2]) }, + { .name = "SCTLR_EL2", .state = ARM_CP_STATE_BOTH, + .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 0, .opc2 = 0, + .access = PL2_RW, .raw_writefn = raw_write, .writefn = sctlr_write, + .fieldoffset = offsetof(CPUARMState, cp15.sctlr_el[2]) }, REGINFO_SENTINEL }; -- 1.9.1