From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 20/39] hw/acpi/aml-build: Add aml_interrupt() term
Date: Fri, 29 May 2015 14:10:26 +0100 [thread overview]
Message-ID: <1432905045-22138-21-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1432905045-22138-1-git-send-email-peter.maydell@linaro.org>
From: Shannon Zhao <shannon.zhao@linaro.org>
Add aml_interrupt() for describing device interrupt in resource template.
These can be used to generating DSDT table for ACPI on ARM.
Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com>
Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-id: 1432522520-8068-7-git-send-email-zhaoshenglong@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/acpi/aml-build.c | 27 +++++++++++++++++++++++++++
include/hw/acpi/aml-build.h | 42 ++++++++++++++++++++++++++++++++++++++++++
2 files changed, 69 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index ad4d7ea..0d99941 100644
--- a/hw/acpi/aml-build.c
+++ b/hw/acpi/aml-build.c
@@ -533,6 +533,33 @@ Aml *aml_memory32_fixed(uint32_t addr, uint32_t size,
return var;
}
+/*
+ * ACPI 5.0: 6.4.3.6 Extended Interrupt Descriptor
+ * Type 1, Large Item Name 0x9
+ */
+Aml *aml_interrupt(AmlConsumerAndProducer con_and_pro,
+ AmlLevelAndEdge level_and_edge,
+ AmlActiveHighAndLow high_and_low, AmlShared shared,
+ uint32_t irq)
+{
+ Aml *var = aml_alloc();
+ uint8_t irq_flags = con_and_pro | (level_and_edge << 1)
+ | (high_and_low << 2) | (shared << 3);
+
+ build_append_byte(var->buf, 0x89); /* Extended irq descriptor */
+ build_append_byte(var->buf, 6); /* Length, bits[7:0] minimum value = 6 */
+ build_append_byte(var->buf, 0); /* Length, bits[15:8] minimum value = 0 */
+ build_append_byte(var->buf, irq_flags); /* Interrupt Vector Information. */
+ build_append_byte(var->buf, 0x01); /* Interrupt table length = 1 */
+
+ /* Interrupt Number */
+ build_append_byte(var->buf, extract32(irq, 0, 8)); /* bits[7:0] */
+ build_append_byte(var->buf, extract32(irq, 8, 8)); /* bits[15:8] */
+ build_append_byte(var->buf, extract32(irq, 16, 8)); /* bits[23:16] */
+ build_append_byte(var->buf, extract32(irq, 24, 8)); /* bits[31:24] */
+ return var;
+}
+
/* ACPI 1.0b: 6.4.2.5 I/O Port Descriptor */
Aml *aml_io(AmlIODecode dec, uint16_t min_base, uint16_t max_base,
uint8_t aln, uint8_t len)
diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
index bd0d9e7..df23479 100644
--- a/include/hw/acpi/aml-build.h
+++ b/include/hw/acpi/aml-build.h
@@ -111,6 +111,44 @@ typedef enum {
AML_READ_WRITE = 1,
} AmlReadAndWrite;
+/*
+ * ACPI 5.0: Table 6-187 Extended Interrupt Descriptor Definition
+ * Interrupt Vector Flags Bits[0] Consumer/Producer
+ */
+typedef enum {
+ AML_CONSUMER_PRODUCER = 0,
+ AML_CONSUMER = 1,
+} AmlConsumerAndProducer;
+
+/*
+ * ACPI 5.0: Table 6-187 Extended Interrupt Descriptor Definition
+ * _HE field definition
+ */
+typedef enum {
+ AML_LEVEL = 0,
+ AML_EDGE = 1,
+} AmlLevelAndEdge;
+
+/*
+ * ACPI 5.0: Table 6-187 Extended Interrupt Descriptor Definition
+ * _LL field definition
+ */
+typedef enum {
+ AML_ACTIVE_HIGH = 0,
+ AML_ACTIVE_LOW = 1,
+} AmlActiveHighAndLow;
+
+/*
+ * ACPI 5.0: Table 6-187 Extended Interrupt Descriptor Definition
+ * _SHR field definition
+ */
+typedef enum {
+ AML_EXCLUSIVE = 0,
+ AML_SHARED = 1,
+ AML_EXCLUSIVE_AND_WAKE = 2,
+ AML_SHARED_AND_WAKE = 3,
+} AmlShared;
+
typedef
struct AcpiBuildTables {
GArray *table_data;
@@ -170,6 +208,10 @@ Aml *aml_call3(const char *method, Aml *arg1, Aml *arg2, Aml *arg3);
Aml *aml_call4(const char *method, Aml *arg1, Aml *arg2, Aml *arg3, Aml *arg4);
Aml *aml_memory32_fixed(uint32_t addr, uint32_t size,
AmlReadAndWrite read_and_write);
+Aml *aml_interrupt(AmlConsumerAndProducer con_and_pro,
+ AmlLevelAndEdge level_and_edge,
+ AmlActiveHighAndLow high_and_low, AmlShared shared,
+ uint32_t irq);
Aml *aml_io(AmlIODecode dec, uint16_t min_base, uint16_t max_base,
uint8_t aln, uint8_t len);
Aml *aml_operation_region(const char *name, AmlRegionSpace rs,
--
1.9.1
next prev parent reply other threads:[~2015-05-29 13:11 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-29 13:10 [Qemu-devel] [PULL 00/39] target-arm queue Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 01/39] target-arm: Add exception target el infrastructure Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 02/39] target-arm: Extend helpers to route exceptions Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 03/39] target-arm: Set correct syndrome for faults on MSR DAIF*, imm Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 04/39] target-arm: Move setting of exception info into tlb_fill Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 05/39] target-arm: Set exception target EL in tlb_fill Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 06/39] target-arm: Make raise_exception() take syndrome and target EL Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 07/39] target-arm: Update interrupt handling to use " Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 08/39] target-arm: Allow cp access functions to indicate traps to EL2 or EL3 Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 09/39] target-arm: Add AArch64 CPTR registers Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 10/39] target-arm: Make singlestate TB flags common between AArch32/64 Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 11/39] target-arm: Extend FP checks to use an EL Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 12/39] target-arm: Move TB flags down to fill gap Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 13/39] target-arm: Don't halt on WFI unless we don't have any work Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 14/39] target-arm: Add WFx instruction trap support Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 15/39] hw/acpi/aml-build: Make enum values to be upper case to match coding style Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 16/39] hw/arm/virt: Move common definitions to virt.h Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 17/39] hw/arm/virt: Record PCIe ranges in MemMapEntry array Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 18/39] hw/arm/virt-acpi-build: Basic framework for building ACPI tables on ARM Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 19/39] hw/acpi/aml-build: Add aml_memory32_fixed() term Peter Maydell
2015-05-29 13:10 ` Peter Maydell [this message]
2015-05-29 13:10 ` [Qemu-devel] [PULL 21/39] hw/arm/virt-acpi-build: Generation of DSDT table for virt devices Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 22/39] hw/arm/virt-acpi-build: Generate FADT table and update ACPI headers Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 23/39] hw/arm/virt-acpi-build: Generate MADT table Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 24/39] hw/arm/virt-acpi-build: Generate GTDT table Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 25/39] hw/arm/virt-acpi-build: Generate RSDT table Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 26/39] hw/arm/virt-acpi-build: Generate RSDP table Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 27/39] hw/arm/virt-acpi-build: Generate MCFG table Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 28/39] hw/acpi/aml-build: Make aml_buffer() definition consistent with the spec Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 29/39] hw/acpi/aml-build: Add ToUUID macro Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 30/39] hw/acpi/aml-build: Add aml_or() term Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 31/39] hw/acpi/aml-build: Add aml_lnot() term Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 32/39] hw/acpi/aml-build: Add aml_else() term Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 33/39] hw/acpi/aml-build: Add aml_create_dword_field() term Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 34/39] hw/acpi/aml-build: Add aml_dword_io() term Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 35/39] hw/acpi/aml-build: Add Unicode macro Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 36/39] hw/arm/virt-acpi-build: Add PCIe controller in ACPI DSDT table Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 37/39] ACPI: split CONFIG_ACPI into 4 pieces Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 38/39] hw/arm/virt: Enable dynamic generation of ACPI v5.1 tables Peter Maydell
2015-05-29 13:10 ` [Qemu-devel] [PULL 39/39] target-arm: Avoid buffer overrun on UNPREDICTABLE ldrd/strd Peter Maydell
2015-05-29 17:46 ` [Qemu-devel] [PULL 00/39] target-arm queue Peter Maydell
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