From: Eduardo Habkost <ehabkost@redhat.com>
To: qemu-devel@nongnu.org, Peter Maydell <peter.maydell@linaro.org>
Cc: "Chen Fan" <chen.fan.fnst@cn.fujitsu.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Andreas Färber" <afaerber@suse.de>,
"Richard Henderson" <rth@twiddle.net>
Subject: [Qemu-devel] [PULL 2/5] apic: map APIC's MMIO region at each CPU's address space
Date: Fri, 29 May 2015 15:04:21 -0300 [thread overview]
Message-ID: <1432922664-15129-3-git-send-email-ehabkost@redhat.com> (raw)
In-Reply-To: <1432922664-15129-1-git-send-email-ehabkost@redhat.com>
From: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Replace mapping APIC at global system address space with
mapping it at per-CPU address spaces.
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Signed-off-by: Zhu Guihua <zhugh.fnst@cn.fujitsu.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
exec.c | 5 +++++
hw/i386/pc.c | 7 -------
hw/intc/apic_common.c | 14 ++++++++------
include/exec/memory.h | 5 +++++
target-i386/cpu.c | 2 ++
5 files changed, 20 insertions(+), 13 deletions(-)
diff --git a/exec.c b/exec.c
index e19ab22..71c02ed 100644
--- a/exec.c
+++ b/exec.c
@@ -2712,6 +2712,11 @@ void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
cpu_notify_map_clients();
}
+MemoryRegion *address_space_root_memory_region(AddressSpace *as)
+{
+ return as->root;
+}
+
void *cpu_physical_memory_map(hwaddr addr,
hwaddr *plen,
int is_write)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 45028ea..185e748 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1096,13 +1096,6 @@ void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge)
object_unref(OBJECT(cpu));
}
- /* map APIC MMIO area if CPU has APIC */
- if (cpu && cpu->apic_state) {
- /* XXX: what if the base changes? */
- sysbus_mmio_map_overlap(SYS_BUS_DEVICE(icc_bridge), 0,
- APIC_DEFAULT_ADDRESS, 0x1000);
- }
-
/* tell smbios about cpuid version and features */
smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]);
}
diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c
index d595d63..f251787 100644
--- a/hw/intc/apic_common.c
+++ b/hw/intc/apic_common.c
@@ -296,7 +296,8 @@ static void apic_common_realize(DeviceState *dev, Error **errp)
APICCommonClass *info;
static DeviceState *vapic;
static int apic_no;
- static bool mmio_registered;
+ CPUState *cpu = CPU(s->cpu);
+ MemoryRegion *root;
if (apic_no >= MAX_APICS) {
error_setg(errp, "%s initialization failed.",
@@ -307,11 +308,12 @@ static void apic_common_realize(DeviceState *dev, Error **errp)
info = APIC_COMMON_GET_CLASS(s);
info->realize(dev, errp);
- if (!mmio_registered) {
- ICCBus *b = ICC_BUS(qdev_get_parent_bus(dev));
- memory_region_add_subregion(b->apic_address_space, 0, &s->io_memory);
- mmio_registered = true;
- }
+
+ root = address_space_root_memory_region(cpu->as);
+ memory_region_add_subregion_overlap(root,
+ s->apicbase & MSR_IA32_APICBASE_BASE,
+ &s->io_memory,
+ 0x1000);
/* Note: We need at least 1M to map the VAPIC option ROM */
if (!vapic && s->vapic_control & VAPIC_ENABLE_MASK &&
diff --git a/include/exec/memory.h b/include/exec/memory.h
index b61c84f..a16650f 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -1295,6 +1295,11 @@ void *address_space_map(AddressSpace *as, hwaddr addr,
void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
int is_write, hwaddr access_len);
+/* address_space_root_memory_region: get root memory region
+ *
+ * @as: #AddressSpace to be accessed
+ */
+MemoryRegion *address_space_root_memory_region(AddressSpace *as);
#endif
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 3305e09..f83e526 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2740,6 +2740,8 @@ static void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
/* TODO: convert to link<> */
apic = APIC_COMMON(cpu->apic_state);
apic->cpu = cpu;
+ cpu_set_apic_base(cpu->apic_state,
+ APIC_DEFAULT_ADDRESS | MSR_IA32_APICBASE_ENABLE);
}
static void x86_cpu_apic_realize(X86CPU *cpu, Error **errp)
--
2.1.0
next prev parent reply other threads:[~2015-05-29 18:05 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-29 18:04 [Qemu-devel] [PULL 0/5] X86 patch queue, 2015-05-29 Eduardo Habkost
2015-05-29 18:04 ` [Qemu-devel] [PULL 1/5] pc: Ensure non-zero CPU ref count after attaching to ICC bus Eduardo Habkost
2015-05-29 18:04 ` Eduardo Habkost [this message]
2015-05-29 19:27 ` [Qemu-devel] [PULL 2/5] apic: map APIC's MMIO region at each CPU's address space Paolo Bonzini
2015-06-01 20:01 ` Eduardo Habkost
2015-06-03 8:29 ` Igor Mammedov
2015-06-03 8:30 ` Paolo Bonzini
2015-05-29 18:04 ` [Qemu-devel] [PULL 3/5] apic: convert ->busdev.qdev casts to C casts Eduardo Habkost
2015-05-29 18:04 ` [Qemu-devel] [PULL 4/5] target-i386: Register QOM properties for feature flags Eduardo Habkost
2015-05-29 18:04 ` [Qemu-devel] [PULL 5/5] arch_init: Drop target-x86_64.conf Eduardo Habkost
2015-05-29 18:57 ` [Qemu-devel] [PULL 0/5] X86 patch queue, 2015-05-29 Peter Maydell
2015-05-29 19:45 ` Eduardo Habkost
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