From: Marcel Apfelbaum <marcel@redhat.com>
To: qemu-devel@nongnu.org
Cc: marcel@redhat.com, mst@redhat.com
Subject: [Qemu-devel] [PATCH V8 16/17] apci: fix PXB behaviour if used with unsupported BIOS
Date: Tue, 2 Jun 2015 14:23:11 +0300 [thread overview]
Message-ID: <1433244192-27624-17-git-send-email-marcel@redhat.com> (raw)
In-Reply-To: <1433244192-27624-1-git-send-email-marcel@redhat.com>
PXB does not work with unsupported bioses, but should
not interfere with normal OS operation.
We don't ship them anymore, but it's reasonable
to keep the work-around until we update the bios in qemu.
Fix this by not adding PXB mem/IO chunks to _CRS
if they weren't configured by BIOS.
Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>
---
hw/i386/acpi-build.c | 87 ++++++++++++++++++++++++++++++++++------------------
1 file changed, 58 insertions(+), 29 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 45c36a8..db32fd1 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -786,6 +786,14 @@ static Aml *build_crs(PCIHostState *host,
range_base = r->addr;
range_limit = r->addr + r->size - 1;
+ /*
+ * Work-around for old bioses
+ * that do not support multiple root buses
+ */
+ if (!range_base || range_base > range_limit) {
+ continue;
+ }
+
if (r->type & PCI_BASE_ADDRESS_SPACE_IO) {
aml_append(crs,
aml_word_io(AML_MIN_FIXED, AML_MAX_FIXED,
@@ -819,45 +827,66 @@ static Aml *build_crs(PCIHostState *host,
range_base = pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_IO);
range_limit = pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_IO);
- aml_append(crs,
- aml_word_io(AML_MIN_FIXED, AML_MAX_FIXED,
- AML_POS_DECODE, AML_ENTIRE_RANGE,
- 0,
- range_base,
- range_limit,
- 0,
- range_limit - range_base + 1));
- crs_range_insert(io_ranges, range_base, range_limit);
+
+ /*
+ * Work-around for old bioses
+ * that do not support multiple root buses
+ */
+ if (range_base || range_base > range_limit) {
+ aml_append(crs,
+ aml_word_io(AML_MIN_FIXED, AML_MAX_FIXED,
+ AML_POS_DECODE, AML_ENTIRE_RANGE,
+ 0,
+ range_base,
+ range_limit,
+ 0,
+ range_limit - range_base + 1));
+ crs_range_insert(io_ranges, range_base, range_limit);
+ }
range_base =
pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_MEMORY);
range_limit =
pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_MEMORY);
- aml_append(crs,
- aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED,
- AML_MAX_FIXED, AML_NON_CACHEABLE,
- AML_READ_WRITE,
- 0,
- range_base,
- range_limit,
- 0,
- range_limit - range_base + 1));
- crs_range_insert(mem_ranges, range_base, range_limit);
+
+ /*
+ * Work-around for old bioses
+ * that do not support multiple root buses
+ */
+ if (range_base || range_base > range_limit) {
+ aml_append(crs,
+ aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED,
+ AML_MAX_FIXED, AML_NON_CACHEABLE,
+ AML_READ_WRITE,
+ 0,
+ range_base,
+ range_limit,
+ 0,
+ range_limit - range_base + 1));
+ crs_range_insert(mem_ranges, range_base, range_limit);
+ }
range_base =
pci_bridge_get_base(dev, PCI_BASE_ADDRESS_MEM_PREFETCH);
range_limit =
pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_MEM_PREFETCH);
- aml_append(crs,
- aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED,
- AML_MAX_FIXED, AML_NON_CACHEABLE,
- AML_READ_WRITE,
- 0,
- range_base,
- range_limit,
- 0,
- range_limit - range_base + 1));
- crs_range_insert(mem_ranges, range_base, range_limit);
+
+ /*
+ * Work-around for old bioses
+ * that do not support multiple root buses
+ */
+ if (range_base || range_base > range_limit) {
+ aml_append(crs,
+ aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED,
+ AML_MAX_FIXED, AML_NON_CACHEABLE,
+ AML_READ_WRITE,
+ 0,
+ range_base,
+ range_limit,
+ 0,
+ range_limit - range_base + 1));
+ crs_range_insert(mem_ranges, range_base, range_limit);
+ }
}
}
--
2.1.0
next prev parent reply other threads:[~2015-06-02 11:23 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-02 11:22 [Qemu-devel] [PATCH V8 00/17] hw/pc: implement multiple primary busses for pc machines Marcel Apfelbaum
2015-06-02 11:22 ` [Qemu-devel] [PATCH V8 01/17] acpi: add implementation of aml_while() term Marcel Apfelbaum
2015-06-02 11:22 ` [Qemu-devel] [PATCH V8 02/17] hw/pci: made pci_bus_is_root a PCIBusClass method Marcel Apfelbaum
2015-06-02 11:22 ` [Qemu-devel] [PATCH V8 03/17] hw/pci: made pci_bus_num " Marcel Apfelbaum
2015-06-02 11:22 ` [Qemu-devel] [PATCH V8 04/17] hw/i386: query only for q35/pc when looking for pci host bridge Marcel Apfelbaum
2015-06-02 11:23 ` [Qemu-devel] [PATCH V8 05/17] hw/pci: extend PCI config access to support devices behind PXB Marcel Apfelbaum
2015-06-02 11:23 ` [Qemu-devel] [PATCH V8 06/17] hw/acpi: add support for i440fx 'snooping' root busses Marcel Apfelbaum
2015-06-02 11:23 ` [Qemu-devel] [PATCH V8 07/17] hw/apci: add _PRT method for extra PCI " Marcel Apfelbaum
2015-06-02 11:23 ` [Qemu-devel] [PATCH V8 08/17] hw/acpi: add _CRS method for extra " Marcel Apfelbaum
2015-06-02 11:23 ` [Qemu-devel] [PATCH V8 09/17] hw/acpi: remove from root bus 0 the crs resources used by other buses Marcel Apfelbaum
2015-06-02 11:23 ` [Qemu-devel] [PATCH V8 10/17] hw/pci: removed 'rootbus nr is 0' assumption from qmp_pci_query Marcel Apfelbaum
2015-06-02 11:23 ` [Qemu-devel] [PATCH V8 11/17] hw/pci: introduce PCI Expander Bridge (PXB) Marcel Apfelbaum
2015-06-02 11:23 ` [Qemu-devel] [PATCH V8 12/17] hw/pci: inform bios if the system has extra pci root buses Marcel Apfelbaum
2015-06-02 11:23 ` [Qemu-devel] [PATCH V8 13/17] hw/pxb: add map_irq func Marcel Apfelbaum
2015-06-02 11:23 ` [Qemu-devel] [PATCH V8 14/17] hw/pci: add support for NUMA nodes Marcel Apfelbaum
2015-06-02 11:23 ` [Qemu-devel] [PATCH V8 15/17] hw/pxb: add numa_node parameter Marcel Apfelbaum
2015-06-02 11:23 ` Marcel Apfelbaum [this message]
2015-06-02 11:23 ` [Qemu-devel] [PATCH V8 17/17] docs: Add PXB documentation Marcel Apfelbaum
2015-06-03 16:12 ` [Qemu-devel] [PATCH V8 00/17] hw/pc: implement multiple primary busses for pc machines Laszlo Ersek
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