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From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
	"Alexander Graf" <agraf@suse.de>,
	"Yongbok Kim" <yongbok.kim@imgtec.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Leon Alrae" <leon.alrae@imgtec.com>,
	"Andreas Färber" <afaerber@suse.de>,
	"Aurelien Jarno" <aurelien@aurel32.net>,
	"Richard Henderson" <rth@twiddle.net>
Subject: [Qemu-devel] [PATCH RFC 1/5] target-s390x: add a cpu_mmu_idx_to_asc function.
Date: Tue,  2 Jun 2015 13:26:47 +0200	[thread overview]
Message-ID: <1433244411-9693-2-git-send-email-aurelien@aurel32.net> (raw)
In-Reply-To: <1433244411-9693-1-git-send-email-aurelien@aurel32.net>

Use constants to define the MMU indexes, and add a function to do
the reverse conversion of cpu_mmu_index.

Cc: Alexander Graf <agraf@suse.de>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 target-s390x/cpu.h | 25 ++++++++++++++++++++++---
 1 file changed, 22 insertions(+), 3 deletions(-)

diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index adb9a84..584e74b 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -302,15 +302,20 @@ static inline CPU_DoubleU *get_freg(CPUS390XState *cs, int nr)
 #define CR0_LOWPROT             0x0000000010000000ULL
 #define CR0_EDAT                0x0000000000800000ULL
 
+/* MMU */
+#define MMU_PRIMARY_IDX         0
+#define MMU_SECONDARY_IDX       1
+#define MMU_HOME_IDX            2
+
 static inline int cpu_mmu_index (CPUS390XState *env)
 {
     switch (env->psw.mask & PSW_MASK_ASC) {
     case PSW_ASC_PRIMARY:
-        return 0;
+        return MMU_PRIMARY_IDX;
     case PSW_ASC_SECONDARY:
-        return 1;
+        return MMU_SECONDARY_IDX;
     case PSW_ASC_HOME:
-        return 2;
+        return MMU_HOME_IDX;
     case PSW_ASC_ACCREG:
         /* Fallthrough: access register mode is not yet supported */
     default:
@@ -318,6 +323,20 @@ static inline int cpu_mmu_index (CPUS390XState *env)
     }
 }
 
+static inline uint64_t cpu_mmu_idx_to_asc(int mmu_idx)
+{
+    switch (mmu_idx) {
+    case MMU_PRIMARY_IDX:
+        return PSW_ASC_PRIMARY;
+    case MMU_SECONDARY_IDX:
+        return PSW_ASC_SECONDARY;
+    case MMU_HOME_IDX:
+        return PSW_ASC_HOME;
+    default:
+        abort();
+    }
+}
+
 static inline void cpu_get_tb_cpu_state(CPUS390XState* env, target_ulong *pc,
                                         target_ulong *cs_base, int *flags)
 {
-- 
2.1.4

  reply	other threads:[~2015-06-02 11:27 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-02 11:26 [Qemu-devel] [PATCH RFC 0/5] softmmu and s390x memory helper improvements Aurelien Jarno
2015-06-02 11:26 ` Aurelien Jarno [this message]
2015-06-02 11:26 ` [Qemu-devel] [PATCH RFC 2/5] target-390x: support non current ASC in s390_cpu_handle_mmu_fault Aurelien Jarno
2015-06-02 11:26 ` [Qemu-devel] [PATCH RFC 3/5] softmmu: add a tlb_vaddr_to_host_fill function Aurelien Jarno
2015-06-02 20:10   ` Aurelien Jarno
2015-06-02 20:58     ` Richard Henderson
2015-06-02 21:11       ` Peter Maydell
2015-06-03 15:18       ` Aurelien Jarno
2015-06-02 20:54   ` Richard Henderson
2015-06-03 15:11     ` Aurelien Jarno
2015-06-02 11:26 ` [Qemu-devel] [PATCH RFC 4/5] target-s390x: function to adjust the length wrt page boundary Aurelien Jarno
2015-06-02 11:26 ` [Qemu-devel] [PATCH RFC 5/5] target-s390x: use softmmu host addr function for mvcp/mvcs Aurelien Jarno

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