From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43181) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YzntV-0008Sp-8W for qemu-devel@nongnu.org; Tue, 02 Jun 2015 11:14:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YzntR-0004Ku-9P for qemu-devel@nongnu.org; Tue, 02 Jun 2015 11:14:21 -0400 Received: from smtp.citrix.com ([66.165.176.89]:46059) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YzntR-0004K3-55 for qemu-devel@nongnu.org; Tue, 02 Jun 2015 11:14:17 -0400 From: Stefano Stabellini Date: Tue, 2 Jun 2015 16:10:40 +0100 Message-ID: <1433257845-3690-6-git-send-email-stefano.stabellini@eu.citrix.com> In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain Subject: [Qemu-devel] [PATCH 06/11] xen/pt: correctly handle PM status bit List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: xen-devel@lists.xensource.com, Jan Beulich , Stefano.Stabellini@eu.citrix.com From: Jan Beulich xen_pt_pmcsr_reg_write() needs an adjustment to deal with the RW1C nature of the not passed through bit 15 (PCI_PM_CTRL_PME_STATUS). This is a preparatory patch for XSA-131. Signed-off-by: Jan Beulich Reviewed-by: Stefano Stabellini --- hw/xen/xen_pt_config_init.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/xen/xen_pt_config_init.c b/hw/xen/xen_pt_config_init.c index 516236a..027ac32 100644 --- a/hw/xen/xen_pt_config_init.c +++ b/hw/xen/xen_pt_config_init.c @@ -948,7 +948,8 @@ static int xen_pt_pmcsr_reg_write(XenPCIPassthroughState *s, /* create value for writing to I/O device register */ throughable_mask = ~reg->emu_mask & valid_mask; - *val = XEN_PT_MERGE_VALUE(*val, dev_value, throughable_mask); + *val = XEN_PT_MERGE_VALUE(*val, dev_value & ~PCI_PM_CTRL_PME_STATUS, + throughable_mask); return 0; } -- 1.7.10.4