From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40226) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yzp8c-0001sA-8h for qemu-devel@nongnu.org; Tue, 02 Jun 2015 12:34:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Yzp8a-0000xk-Ue for qemu-devel@nongnu.org; Tue, 02 Jun 2015 12:34:02 -0400 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:34364) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yzp8a-0000r2-MU for qemu-devel@nongnu.org; Tue, 02 Jun 2015 12:34:00 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1Yzp8S-00030n-SA for qemu-devel@nongnu.org; Tue, 02 Jun 2015 17:33:52 +0100 From: Peter Maydell Date: Tue, 2 Jun 2015 17:33:35 +0100 Message-Id: <1433262832-11527-6-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1433262832-11527-1-git-send-email-peter.maydell@linaro.org> References: <1433262832-11527-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PULL 05/22] target-arm: Add TPIDR_EL2 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias Message-id: 1432881807-18164-7-git-send-email-edgar.iglesias@gmail.com [PMM: reordered fields into preferred opc0/opc1/crn/crm/opc2 order] Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target-arm/helper.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/target-arm/helper.c b/target-arm/helper.c index 334e008..27cfd12 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2530,6 +2530,9 @@ static const ARMCPRegInfo v8_el3_no_el2_cp_reginfo[] = { { .name = "SCTLR_EL2", .state = ARM_CP_STATE_BOTH, .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 0, .opc2 = 0, .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 }, + { .name = "TPIDR_EL2", .state = ARM_CP_STATE_BOTH, + .opc0 = 3, .opc1 = 4, .crn = 13, .crm = 0, .opc2 = 2, + .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 }, REGINFO_SENTINEL }; @@ -2618,6 +2621,10 @@ static const ARMCPRegInfo v8_el2_cp_reginfo[] = { .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 0, .opc2 = 0, .access = PL2_RW, .raw_writefn = raw_write, .writefn = sctlr_write, .fieldoffset = offsetof(CPUARMState, cp15.sctlr_el[2]) }, + { .name = "TPIDR_EL2", .state = ARM_CP_STATE_BOTH, + .opc0 = 3, .opc1 = 4, .crn = 13, .crm = 0, .opc2 = 2, + .access = PL2_RW, .resetvalue = 0, + .fieldoffset = offsetof(CPUARMState, cp15.tpidr_el[2]) }, REGINFO_SENTINEL }; -- 1.9.1