From: Sergey Fedorov <serge.fdrv@gmail.com>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
Sergey Fedorov <serge.fdrv@gmail.com>
Subject: [Qemu-devel] [PATCH 0/2] target-arm: Clean up ARMv8 MIDR register space
Date: Wed, 3 Jun 2015 11:44:06 +0300 [thread overview]
Message-ID: <1433321048-23793-1-git-send-email-serge.fdrv@gmail.com> (raw)
This patch series combines two changes:
* use correct REVIDR reset value for Cortex-A53/A57
* add missing MIDR AArch32 aliases
Sergey Fedorov (2):
target-arm: Fix REVIDR reset value
target-arm: Add AArch32 MIDR aliases in ARMv8
target-arm/cpu-qom.h | 1 +
target-arm/cpu64.c | 2 ++
target-arm/helper.c | 13 ++++++++-----
3 files changed, 11 insertions(+), 5 deletions(-)
--
1.9.1
next reply other threads:[~2015-06-03 8:44 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-03 8:44 Sergey Fedorov [this message]
2015-06-03 8:44 ` [Qemu-devel] [PATCH 1/2] target-arm: Fix REVIDR reset value Sergey Fedorov
2015-06-03 8:44 ` [Qemu-devel] [PATCH 2/2] target-arm: add AArch32 MIDR aliases in ARMv8 Sergey Fedorov
2015-06-12 14:45 ` [Qemu-devel] [PATCH 0/2] target-arm: Clean up ARMv8 MIDR register space Peter Maydell
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