From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: lersek@redhat.com, kraxel@redhat.com, mst@redhat.com
Subject: [Qemu-devel] [PATCH v2 01/23] target-i386: introduce cpu_get_mem_attrs
Date: Wed, 3 Jun 2015 19:08:26 +0200 [thread overview]
Message-ID: <1433351328-23326-2-git-send-email-pbonzini@redhat.com> (raw)
In-Reply-To: <1433351328-23326-1-git-send-email-pbonzini@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
include/exec/memattrs.h | 4 +++-
target-i386/cpu.h | 5 +++++
target-i386/helper.c | 3 ++-
target-i386/kvm.c | 2 +-
4 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h
index 96dc440..f8537a8 100644
--- a/include/exec/memattrs.h
+++ b/include/exec/memattrs.h
@@ -29,7 +29,9 @@ typedef struct MemTxAttrs {
* "didn't specify" if necessary.
*/
unsigned int unspecified:1;
- /* ARM/AMBA TrustZone Secure access */
+ /* ARM/AMBA: TrustZone Secure access
+ * x86: System Management Mode access
+ */
unsigned int secure:1;
/* Memory access is usermode (unprivileged) */
unsigned int user:1;
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 4ee12ca..64c2783 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -1292,6 +1292,11 @@ static inline void cpu_load_efer(CPUX86State *env, uint64_t val)
}
}
+static inline MemTxAttrs cpu_get_mem_attrs(CPUX86State *env)
+{
+ return ((MemTxAttrs) { .secure = (env->hflags & HF_SMM_MASK) != 0 });
+}
+
/* fpu_helper.c */
void cpu_set_mxcsr(CPUX86State *env, uint32_t val);
void cpu_set_fpuc(CPUX86State *env, uint16_t val);
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 4f1ddf7..62e801b 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -771,7 +771,8 @@ do_check_protect_pse36:
page_offset = vaddr & (page_size - 1);
paddr = pte + page_offset;
- tlb_set_page(cs, vaddr, paddr, prot, mmu_idx, page_size);
+ tlb_set_page_with_attrs(cs, vaddr, paddr, cpu_get_mem_attrs(env),
+ prot, mmu_idx, page_size);
return 0;
do_fault_rsvd:
error_code |= PG_ERROR_RSVD_MASK;
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index a26d25a..009bf74 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -2259,7 +2259,7 @@ MemTxAttrs kvm_arch_post_run(CPUState *cpu, struct kvm_run *run)
}
cpu_set_apic_tpr(x86_cpu->apic_state, run->cr8);
cpu_set_apic_base(x86_cpu->apic_state, run->apic_base);
- return MEMTXATTRS_UNSPECIFIED;
+ return cpu_get_mem_attrs(env);
}
int kvm_arch_process_async_events(CPUState *cs)
--
2.4.1
next prev parent reply other threads:[~2015-06-03 17:08 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-03 17:08 [Qemu-devel] [PATCH v2 00/23] SMM improvements (chipset and TCG parts) Paolo Bonzini
2015-06-03 17:08 ` Paolo Bonzini [this message]
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 02/23] target-i386: Use correct memory attributes for memory accesses Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 03/23] target-i386: Use correct memory attributes for ioport accesses Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 04/23] target-i386: mask NMIs on entry to SMM Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 05/23] target-i386: set G=1 in SMM big real mode selectors Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 06/23] target-i386: wake up processors that receive an SMI Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 07/23] pflash_cfi01: change big-endian property to BIT type Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 08/23] pflash_cfi01: change to new-style MMIO accessors Paolo Bonzini
2015-06-04 6:19 ` Peter Crosthwaite
2015-06-04 8:02 ` Paolo Bonzini
2015-06-04 12:51 ` Laszlo Ersek
2015-06-09 18:08 ` Richard Henderson
2015-06-09 18:47 ` Michael S. Tsirkin
2015-06-17 7:56 ` Paolo Bonzini
2015-06-17 8:22 ` Markus Armbruster
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 09/23] pflash_cfi01: add secure property Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 10/23] vl: allow full-blown QemuOpts syntax for -global Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 11/23] qom: add object_property_add_const_link Paolo Bonzini
2015-06-04 6:33 ` Peter Crosthwaite
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 12/23] vl: run "late" notifiers immediately Paolo Bonzini
2015-06-04 6:39 ` Peter Crosthwaite
2015-06-04 8:03 ` Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 13/23] target-i386: create a separate AddressSpace for each CPU Paolo Bonzini
2015-06-03 17:58 ` Peter Crosthwaite
2015-06-04 8:02 ` Paolo Bonzini
2015-06-04 12:48 ` Laszlo Ersek
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 14/23] hw/i386: add a separate region that tracks the SMRAME bit Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 15/23] target-i386: use memory API to implement SMRAM Paolo Bonzini
2015-06-04 7:19 ` Peter Crosthwaite
2015-06-04 8:05 ` Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 16/23] hw/i386: remove smram_update Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 17/23] q35: implement high SMRAM Paolo Bonzini
2015-06-04 12:50 ` Michael S. Tsirkin
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 18/23] q35: fix ESMRAMC default Paolo Bonzini
2015-06-04 12:51 ` Michael S. Tsirkin
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 19/23] q35: add config space wmask for SMRAM and ESMRAMC Paolo Bonzini
2015-06-04 12:51 ` Michael S. Tsirkin
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 20/23] q35: implement SMRAM.D_LCK Paolo Bonzini
2015-06-04 12:51 ` Michael S. Tsirkin
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 21/23] q35: add test for SMRAM.D_LCK Paolo Bonzini
2015-06-04 12:52 ` Michael S. Tsirkin
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 22/23] q35: implement TSEG Paolo Bonzini
2015-06-04 12:53 ` Michael S. Tsirkin
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 23/23] ich9: implement SMI_LOCK Paolo Bonzini
2015-06-04 12:53 ` Michael S. Tsirkin
2015-06-03 17:41 ` [Qemu-devel] [PATCH v2 00/23] SMM improvements (chipset and TCG parts) Laszlo Ersek
2015-06-03 17:44 ` Paolo Bonzini
2015-06-04 12:54 ` Michael S. Tsirkin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1433351328-23326-2-git-send-email-pbonzini@redhat.com \
--to=pbonzini@redhat.com \
--cc=kraxel@redhat.com \
--cc=lersek@redhat.com \
--cc=mst@redhat.com \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).