From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49574) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0C9v-0006Oq-Jg for qemu-devel@nongnu.org; Wed, 03 Jun 2015 13:08:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z0C9u-00081S-4m for qemu-devel@nongnu.org; Wed, 03 Jun 2015 13:08:55 -0400 Received: from mx1.redhat.com ([209.132.183.28]:44331) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0C9t-00081A-Vc for qemu-devel@nongnu.org; Wed, 03 Jun 2015 13:08:54 -0400 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) by mx1.redhat.com (Postfix) with ESMTPS id B4F9DBBF5E for ; Wed, 3 Jun 2015 17:08:53 +0000 (UTC) From: Paolo Bonzini Date: Wed, 3 Jun 2015 19:08:26 +0200 Message-Id: <1433351328-23326-2-git-send-email-pbonzini@redhat.com> In-Reply-To: <1433351328-23326-1-git-send-email-pbonzini@redhat.com> References: <1433351328-23326-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PATCH v2 01/23] target-i386: introduce cpu_get_mem_attrs List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: lersek@redhat.com, kraxel@redhat.com, mst@redhat.com Signed-off-by: Paolo Bonzini --- include/exec/memattrs.h | 4 +++- target-i386/cpu.h | 5 +++++ target-i386/helper.c | 3 ++- target-i386/kvm.c | 2 +- 4 files changed, 11 insertions(+), 3 deletions(-) diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h index 96dc440..f8537a8 100644 --- a/include/exec/memattrs.h +++ b/include/exec/memattrs.h @@ -29,7 +29,9 @@ typedef struct MemTxAttrs { * "didn't specify" if necessary. */ unsigned int unspecified:1; - /* ARM/AMBA TrustZone Secure access */ + /* ARM/AMBA: TrustZone Secure access + * x86: System Management Mode access + */ unsigned int secure:1; /* Memory access is usermode (unprivileged) */ unsigned int user:1; diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 4ee12ca..64c2783 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -1292,6 +1292,11 @@ static inline void cpu_load_efer(CPUX86State *env, uint64_t val) } } +static inline MemTxAttrs cpu_get_mem_attrs(CPUX86State *env) +{ + return ((MemTxAttrs) { .secure = (env->hflags & HF_SMM_MASK) != 0 }); +} + /* fpu_helper.c */ void cpu_set_mxcsr(CPUX86State *env, uint32_t val); void cpu_set_fpuc(CPUX86State *env, uint16_t val); diff --git a/target-i386/helper.c b/target-i386/helper.c index 4f1ddf7..62e801b 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -771,7 +771,8 @@ do_check_protect_pse36: page_offset = vaddr & (page_size - 1); paddr = pte + page_offset; - tlb_set_page(cs, vaddr, paddr, prot, mmu_idx, page_size); + tlb_set_page_with_attrs(cs, vaddr, paddr, cpu_get_mem_attrs(env), + prot, mmu_idx, page_size); return 0; do_fault_rsvd: error_code |= PG_ERROR_RSVD_MASK; diff --git a/target-i386/kvm.c b/target-i386/kvm.c index a26d25a..009bf74 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -2259,7 +2259,7 @@ MemTxAttrs kvm_arch_post_run(CPUState *cpu, struct kvm_run *run) } cpu_set_apic_tpr(x86_cpu->apic_state, run->cr8); cpu_set_apic_base(x86_cpu->apic_state, run->apic_base); - return MEMTXATTRS_UNSPECIFIED; + return cpu_get_mem_attrs(env); } int kvm_arch_process_async_events(CPUState *cs) -- 2.4.1