From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60441) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0FvJ-0001Mk-W5 for qemu-devel@nongnu.org; Wed, 03 Jun 2015 17:10:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z0FvI-0007rd-8L for qemu-devel@nongnu.org; Wed, 03 Jun 2015 17:10:05 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:101::1]:40081) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0FvH-0007po-QY for qemu-devel@nongnu.org; Wed, 03 Jun 2015 17:10:03 -0400 From: Aurelien Jarno Date: Wed, 3 Jun 2015 23:09:49 +0200 Message-Id: <1433365796-1118-10-git-send-email-aurelien@aurel32.net> In-Reply-To: <1433365796-1118-1-git-send-email-aurelien@aurel32.net> References: <1433365796-1118-1-git-send-email-aurelien@aurel32.net> Subject: [Qemu-devel] [PATCH v2 09/16] target-s390x: implement LPDFR and LNDFR instructions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Alexander Graf , Aurelien Jarno , Richard Henderson This complete the floating point support sign handling facility. Cc: Alexander Graf Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- target-s390x/insn-data.def | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index e638b0b..41b5f43 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -451,6 +451,7 @@ C(0xb301, LNEBR, RRE, Z, 0, e2, new, e1, nabsf32, f32) C(0xb311, LNDBR, RRE, Z, 0, f2_o, f1, 0, nabsf64, f64) C(0xb341, LNXBR, RRE, Z, 0, x2_o, x1, 0, nabsf128, f128) + C(0xb371, LNDFR, RRE, FPSSH, 0, f2_o, f1, 0, nabsf64, 0) /* LOAD ON CONDITION */ C(0xb9f2, LOCR, RRF_c, LOC, r1, r2, new, r1_32, loc, 0) C(0xb9e2, LOCGR, RRF_c, LOC, r1, r2, r1, 0, loc, 0) @@ -464,6 +465,7 @@ C(0xb300, LPEBR, RRE, Z, 0, e2, new, e1, absf32, f32) C(0xb310, LPDBR, RRE, Z, 0, f2_o, f1, 0, absf64, f64) C(0xb340, LPXBR, RRE, Z, 0, x2_o, x1, 0, absf128, f128) + C(0xb370, LPDFR, RRE, FPSSH, 0, f2_o, f1, 0, absf64, 0) /* LOAD REVERSED */ C(0xb91f, LRVR, RRE, Z, 0, r2_32u, new, r1_32, rev32, 0) C(0xb90f, LRVGR, RRE, Z, 0, r2_o, r1, 0, rev64, 0) -- 2.1.4