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From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Cc: Alexander Graf <agraf@suse.de>,
	Aurelien Jarno <aurelien@aurel32.net>,
	Richard Henderson <rth@twiddle.net>
Subject: [Qemu-devel] [PATCH v2 03/16] target-s390x: change CHRL and CGHRL format to RIL-b
Date: Wed,  3 Jun 2015 23:09:43 +0200	[thread overview]
Message-ID: <1433365796-1118-4-git-send-email-aurelien@aurel32.net> (raw)
In-Reply-To: <1433365796-1118-1-git-send-email-aurelien@aurel32.net>

Change to match the PoP. In practice both format RIL-a and RIL-b have
the same fields. They differ on the way we decode the fields, and it's
done correctly in QEMU.

Cc: Alexander Graf <agraf@suse.de>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 target-s390x/insn-data.def | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def
index 3955443..75672a0 100644
--- a/target-s390x/insn-data.def
+++ b/target-s390x/insn-data.def
@@ -159,8 +159,8 @@
     C(0xe55c, CHSI,    SIL,   GIE, m1_32s, i2, 0, 0, 0, cmps64)
     C(0xe558, CGHSI,   SIL,   GIE, m1_64, i2, 0, 0, 0, cmps64)
 /* COMPARE HALFWORD RELATIVE LONG */
-    C(0xc605, CHRL,    RIL_a, GIE, r1_o, mri2_32s, 0, 0, 0, cmps32)
-    C(0xc604, CGHRL,   RIL_a, GIE, r1_o, mri2_64, 0, 0, 0, cmps64)
+    C(0xc605, CHRL,    RIL_b, GIE, r1_o, mri2_32s, 0, 0, 0, cmps32)
+    C(0xc604, CGHRL,   RIL_b, GIE, r1_o, mri2_64, 0, 0, 0, cmps64)
 
 /* COMPARE LOGICAL */
     C(0x1500, CLR,     RR_a,  Z,   r1, r2, 0, 0, 0, cmpu32)
-- 
2.1.4

  parent reply	other threads:[~2015-06-03 21:10 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-03 21:09 [Qemu-devel] [PATCH v2 00/16] fixes and improvements Aurelien Jarno
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 01/16] target-s390x: fix exception for invalid operation code Aurelien Jarno
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 02/16] target-s390x: fix CLGIT instruction Aurelien Jarno
2015-06-03 21:09 ` Aurelien Jarno [this message]
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 04/16] target-s390x: move STORE CLOCK FAST to the correct facility Aurelien Jarno
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 05/16] target-s390x: move SET DFP ROUNDING MODE " Aurelien Jarno
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 06/16] target-s390x: implement LOAD FP INTEGER instructions Aurelien Jarno
2015-06-03 22:26   ` Richard Henderson
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 07/16] target-s390x: implement TRANSLATE AND TEST instruction Aurelien Jarno
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 08/16] target-s390x: implement TRANSLATE EXTENDED instruction Aurelien Jarno
2015-06-03 21:37   ` Richard Henderson
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 09/16] target-s390x: implement LPDFR and LNDFR instructions Aurelien Jarno
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 10/16] target-s390x: implement miscellaneous-instruction-extensions facility Aurelien Jarno
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 11/16] target-s390x: implement load-and-trap facility Aurelien Jarno
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 12/16] target-s390x: implement high-word facility Aurelien Jarno
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 13/16] target-s390x: add a cpu_mmu_idx_to_asc function Aurelien Jarno
2015-06-03 21:40   ` Richard Henderson
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 14/16] target-s390x: support non current ASC in s390_cpu_handle_mmu_fault Aurelien Jarno
2015-06-03 21:42   ` Richard Henderson
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 15/16] target-s390x: use softmmu functions for mvcp/mvcs Aurelien Jarno
2015-06-03 22:06   ` Richard Henderson
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 16/16] target-s390x: fix MVC instruction when areas overlap Aurelien Jarno
2015-06-03 21:54   ` Richard Henderson
2015-06-03 22:29 ` [Qemu-devel] [PATCH v2 00/16] fixes and improvements Alexander Graf

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