From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Cc: Alexander Graf <agraf@suse.de>,
Aurelien Jarno <aurelien@aurel32.net>,
Richard Henderson <rth@twiddle.net>
Subject: [Qemu-devel] [PATCH v2 06/16] target-s390x: implement LOAD FP INTEGER instructions
Date: Wed, 3 Jun 2015 23:09:46 +0200 [thread overview]
Message-ID: <1433365796-1118-7-git-send-email-aurelien@aurel32.net> (raw)
In-Reply-To: <1433365796-1118-1-git-send-email-aurelien@aurel32.net>
This is needed to pass the gcc.c-torture/execute/ieee/20010114-2.c test
in the gcc testsuite.
Cc: Alexander Graf <agraf@suse.de>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
target-s390x/fpu_helper.c | 31 +++++++++++++++++++++++++++++++
target-s390x/helper.h | 3 +++
target-s390x/insn-data.def | 4 ++++
target-s390x/translate.c | 25 +++++++++++++++++++++++++
4 files changed, 63 insertions(+)
diff --git a/target-s390x/fpu_helper.c b/target-s390x/fpu_helper.c
index 96eabb6..45b7ddf 100644
--- a/target-s390x/fpu_helper.c
+++ b/target-s390x/fpu_helper.c
@@ -552,6 +552,37 @@ uint64_t HELPER(clfxb)(CPUS390XState *env, uint64_t h, uint64_t l, uint32_t m3)
return ret;
}
+/* round to integer 32-bit */
+uint64_t HELPER(fieb)(CPUS390XState *env, uint64_t f2, uint32_t m3)
+{
+ int hold = swap_round_mode(env, m3);
+ float32 ret = float32_round_to_int(f2, &env->fpu_status);
+ set_float_rounding_mode(hold, &env->fpu_status);
+ handle_exceptions(env, GETPC());
+ return ret;
+}
+
+/* round to integer 64-bit */
+uint64_t HELPER(fidb)(CPUS390XState *env, uint64_t f2, uint32_t m3)
+{
+ int hold = swap_round_mode(env, m3);
+ float64 ret = float64_round_to_int(f2, &env->fpu_status);
+ set_float_rounding_mode(hold, &env->fpu_status);
+ handle_exceptions(env, GETPC());
+ return ret;
+}
+
+/* round to integer 128-bit */
+uint64_t HELPER(fixb)(CPUS390XState *env, uint64_t ah, uint64_t al, uint32_t m3)
+{
+ int hold = swap_round_mode(env, m3);
+ float128 ret = float128_round_to_int(make_float128(ah, al),
+ &env->fpu_status);
+ set_float_rounding_mode(hold, &env->fpu_status);
+ handle_exceptions(env, GETPC());
+ return RET128(ret);
+}
+
/* 32-bit FP multiply and add */
uint64_t HELPER(maeb)(CPUS390XState *env, uint64_t f1,
uint64_t f2, uint64_t f3)
diff --git a/target-s390x/helper.h b/target-s390x/helper.h
index e6f2afb..cb0b421 100644
--- a/target-s390x/helper.h
+++ b/target-s390x/helper.h
@@ -60,6 +60,9 @@ DEF_HELPER_FLAGS_4(clgxb, TCG_CALL_NO_WG, i64, env, i64, i64, i32)
DEF_HELPER_FLAGS_3(clfeb, TCG_CALL_NO_WG, i64, env, i64, i32)
DEF_HELPER_FLAGS_3(clfdb, TCG_CALL_NO_WG, i64, env, i64, i32)
DEF_HELPER_FLAGS_4(clfxb, TCG_CALL_NO_WG, i64, env, i64, i64, i32)
+DEF_HELPER_FLAGS_3(fieb, TCG_CALL_NO_WG, i64, env, i64, i32)
+DEF_HELPER_FLAGS_3(fidb, TCG_CALL_NO_WG, i64, env, i64, i32)
+DEF_HELPER_FLAGS_4(fixb, TCG_CALL_NO_WG, i64, env, i64, i64, i32)
DEF_HELPER_FLAGS_4(maeb, TCG_CALL_NO_WG, i64, env, i64, i64, i64)
DEF_HELPER_FLAGS_4(madb, TCG_CALL_NO_WG, i64, env, i64, i64, i64)
DEF_HELPER_FLAGS_4(mseb, TCG_CALL_NO_WG, i64, env, i64, i64, i64)
diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def
index 8325684..a12939d 100644
--- a/target-s390x/insn-data.def
+++ b/target-s390x/insn-data.def
@@ -479,6 +479,10 @@
C(0xb29d, LFPC, S, Z, 0, m2_32u, 0, 0, sfpc, 0)
/* LOAD FPC AND SIGNAL */
C(0xb2bd, LFAS, S, IEEEE_SIM, 0, m2_32u, 0, 0, sfas, 0)
+/* LOAD FP INTEGER */
+ C(0xb357, FIEBR, RRF_e, Z, 0, e2, new, e1, fieb, 0)
+ C(0xb35f, FIDBR, RRF_e, Z, 0, f2_o, f1, 0, fidb, 0)
+ C(0xb347, FIXBR, RRF_e, Z, 0, x2_o, x1, 0, fixb, 0)
/* LOAD LENGTHENED */
C(0xb304, LDEBR, RRE, Z, 0, e2, f1, 0, ldeb, 0)
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index c7ebd21..b0dbfe8 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -2116,6 +2116,31 @@ static ExitStatus op_ex(DisasContext *s, DisasOps *o)
return NO_EXIT;
}
+static ExitStatus op_fieb(DisasContext *s, DisasOps *o)
+{
+ TCGv_i32 m3 = tcg_const_i32(get_field(s->fields, m3));
+ gen_helper_fieb(o->out, cpu_env, o->in2, m3);
+ tcg_temp_free_i32(m3);
+ return NO_EXIT;
+}
+
+static ExitStatus op_fidb(DisasContext *s, DisasOps *o)
+{
+ TCGv_i32 m3 = tcg_const_i32(get_field(s->fields, m3));
+ gen_helper_fidb(o->out, cpu_env, o->in2, m3);
+ tcg_temp_free_i32(m3);
+ return NO_EXIT;
+}
+
+static ExitStatus op_fixb(DisasContext *s, DisasOps *o)
+{
+ TCGv_i32 m3 = tcg_const_i32(get_field(s->fields, m3));
+ gen_helper_fixb(o->out, cpu_env, o->in1, o->in2, m3);
+ return_low128(o->out2);
+ tcg_temp_free_i32(m3);
+ return NO_EXIT;
+}
+
static ExitStatus op_flogr(DisasContext *s, DisasOps *o)
{
/* We'll use the original input for cc computation, since we get to
--
2.1.4
next prev parent reply other threads:[~2015-06-03 21:10 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-03 21:09 [Qemu-devel] [PATCH v2 00/16] fixes and improvements Aurelien Jarno
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 01/16] target-s390x: fix exception for invalid operation code Aurelien Jarno
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 02/16] target-s390x: fix CLGIT instruction Aurelien Jarno
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 03/16] target-s390x: change CHRL and CGHRL format to RIL-b Aurelien Jarno
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 04/16] target-s390x: move STORE CLOCK FAST to the correct facility Aurelien Jarno
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 05/16] target-s390x: move SET DFP ROUNDING MODE " Aurelien Jarno
2015-06-03 21:09 ` Aurelien Jarno [this message]
2015-06-03 22:26 ` [Qemu-devel] [PATCH v2 06/16] target-s390x: implement LOAD FP INTEGER instructions Richard Henderson
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 07/16] target-s390x: implement TRANSLATE AND TEST instruction Aurelien Jarno
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 08/16] target-s390x: implement TRANSLATE EXTENDED instruction Aurelien Jarno
2015-06-03 21:37 ` Richard Henderson
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 09/16] target-s390x: implement LPDFR and LNDFR instructions Aurelien Jarno
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 10/16] target-s390x: implement miscellaneous-instruction-extensions facility Aurelien Jarno
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 11/16] target-s390x: implement load-and-trap facility Aurelien Jarno
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 12/16] target-s390x: implement high-word facility Aurelien Jarno
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 13/16] target-s390x: add a cpu_mmu_idx_to_asc function Aurelien Jarno
2015-06-03 21:40 ` Richard Henderson
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 14/16] target-s390x: support non current ASC in s390_cpu_handle_mmu_fault Aurelien Jarno
2015-06-03 21:42 ` Richard Henderson
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 15/16] target-s390x: use softmmu functions for mvcp/mvcs Aurelien Jarno
2015-06-03 22:06 ` Richard Henderson
2015-06-03 21:09 ` [Qemu-devel] [PATCH v2 16/16] target-s390x: fix MVC instruction when areas overlap Aurelien Jarno
2015-06-03 21:54 ` Richard Henderson
2015-06-03 22:29 ` [Qemu-devel] [PATCH v2 00/16] fixes and improvements Alexander Graf
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1433365796-1118-7-git-send-email-aurelien@aurel32.net \
--to=aurelien@aurel32.net \
--cc=agraf@suse.de \
--cc=qemu-devel@nongnu.org \
--cc=rth@twiddle.net \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).