From: "Michael S. Tsirkin" <mst@redhat.com>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
Eduardo Habkost <ehabkost@redhat.com>,
Marcel Apfelbaum <marcel@redhat.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Laszlo Ersek <lersek@redhat.com>,
Richard Henderson <rth@twiddle.net>
Subject: [Qemu-devel] [PULL 13/28] hw/apci: add _PRT method for extra PCI root busses
Date: Thu, 4 Jun 2015 13:10:50 +0200 [thread overview]
Message-ID: <1433416111-19022-14-git-send-email-mst@redhat.com> (raw)
In-Reply-To: <1433416111-19022-1-git-send-email-mst@redhat.com>
From: Marcel Apfelbaum <marcel@redhat.com>
Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
---
hw/i386/acpi-build.c | 81 ++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 81 insertions(+)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index a7e248d..451566f 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -617,6 +617,86 @@ static void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus,
aml_append(parent_scope, method);
}
+/*
+ * initialize_route - Initialize the interrupt routing rule
+ * through a specific LINK:
+ * if (lnk_idx == idx)
+ * route using link 'link_name'
+ */
+static Aml *initialize_route(Aml *route, const char *link_name,
+ Aml *lnk_idx, int idx)
+{
+ Aml *if_ctx = aml_if(aml_equal(lnk_idx, aml_int(idx)));
+ Aml *pkg = aml_package(4);
+
+ aml_append(pkg, aml_int(0));
+ aml_append(pkg, aml_int(0));
+ aml_append(pkg, aml_name("%s", link_name));
+ aml_append(pkg, aml_int(0));
+ aml_append(if_ctx, aml_store(pkg, route));
+
+ return if_ctx;
+}
+
+/*
+ * build_prt - Define interrupt rounting rules
+ *
+ * Returns an array of 128 routes, one for each device,
+ * based on device location.
+ * The main goal is to equaly distribute the interrupts
+ * over the 4 existing ACPI links (works only for i440fx).
+ * The hash function is (slot + pin) & 3 -> "LNK[D|A|B|C]".
+ *
+ */
+static Aml *build_prt(void)
+{
+ Aml *method, *while_ctx, *pin, *res;
+
+ method = aml_method("_PRT", 0);
+ res = aml_local(0);
+ pin = aml_local(1);
+ aml_append(method, aml_store(aml_package(128), res));
+ aml_append(method, aml_store(aml_int(0), pin));
+
+ /* while (pin < 128) */
+ while_ctx = aml_while(aml_lless(pin, aml_int(128)));
+ {
+ Aml *slot = aml_local(2);
+ Aml *lnk_idx = aml_local(3);
+ Aml *route = aml_local(4);
+
+ /* slot = pin >> 2 */
+ aml_append(while_ctx,
+ aml_store(aml_shiftright(pin, aml_int(2)), slot));
+ /* lnk_idx = (slot + pin) & 3 */
+ aml_append(while_ctx,
+ aml_store(aml_and(aml_add(pin, slot), aml_int(3)), lnk_idx));
+
+ /* route[2] = "LNK[D|A|B|C]", selection based on pin % 3 */
+ aml_append(while_ctx, initialize_route(route, "LNKD", lnk_idx, 0));
+ aml_append(while_ctx, initialize_route(route, "LNKA", lnk_idx, 1));
+ aml_append(while_ctx, initialize_route(route, "LNKB", lnk_idx, 2));
+ aml_append(while_ctx, initialize_route(route, "LNKC", lnk_idx, 3));
+
+ /* route[0] = 0x[slot]FFFF */
+ aml_append(while_ctx,
+ aml_store(aml_or(aml_shiftleft(slot, aml_int(16)), aml_int(0xFFFF)),
+ aml_index(route, aml_int(0))));
+ /* route[1] = pin & 3 */
+ aml_append(while_ctx,
+ aml_store(aml_and(pin, aml_int(3)), aml_index(route, aml_int(1))));
+ /* res[pin] = route */
+ aml_append(while_ctx, aml_store(route, aml_index(res, pin)));
+ /* pin++ */
+ aml_append(while_ctx, aml_increment(pin));
+ }
+ aml_append(method, while_ctx);
+ /* return res*/
+ aml_append(method, aml_return(res));
+
+ return method;
+}
+
static void
build_ssdt(GArray *table_data, GArray *linker,
AcpiCpuInfo *cpu, AcpiPmInfo *pm, AcpiMiscInfo *misc,
@@ -655,6 +735,7 @@ build_ssdt(GArray *table_data, GArray *linker,
aml_name_decl("_UID", aml_string("PC%.02X", bus_num)));
aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A03")));
aml_append(dev, aml_name_decl("_BBN", aml_int(bus_num)));
+ aml_append(dev, build_prt());
aml_append(scope, dev);
aml_append(ssdt, scope);
}
--
MST
next prev parent reply other threads:[~2015-06-04 11:10 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-04 11:10 [Qemu-devel] [PULL 00/28] pc, acpi, virtio, tpm Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 01/28] acpi: add missing ssdt Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 02/28] hw/q35: fix floppy controller definition in ich9 Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 03/28] virtio-pci: don't try to mask or unmask vqs without notifiers Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 04/28] TPM: fix build with tpm disabled Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 05/28] virtio: 64bit features fixups Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 06/28] acpi: add acpi_send_gpe_event() to rise sci for hotplug Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 07/28] acpi: add implementation of aml_while() term Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 08/28] hw/pci: made pci_bus_is_root a PCIBusClass method Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 09/28] hw/pci: made pci_bus_num " Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 10/28] hw/i386: query only for q35/pc when looking for pci host bridge Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 11/28] hw/pci: extend PCI config access to support devices behind PXB Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 12/28] hw/acpi: add support for i440fx 'snooping' root busses Michael S. Tsirkin
2015-06-04 11:10 ` Michael S. Tsirkin [this message]
2015-06-04 11:10 ` [Qemu-devel] [PULL 14/28] hw/acpi: add _CRS method for extra " Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 15/28] hw/acpi: remove from root bus 0 the crs resources used by other buses Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 16/28] hw/pci: removed 'rootbus nr is 0' assumption from qmp_pci_query Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 17/28] hw/pci: introduce PCI Expander Bridge (PXB) Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 18/28] hw/pci: inform bios if the system has extra pci root buses Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 19/28] hw/pxb: add map_irq func Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 20/28] hw/pci: add support for NUMA nodes Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 21/28] hw/pxb: add numa_node parameter Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 22/28] apci: fix PXB behaviour if used with unsupported BIOS Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 23/28] docs: Add PXB documentation Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 24/28] pc-dimm: don't assert if pc-dimm alignment != hotpluggable mem range size Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 25/28] hw/acpi: acpi_pm1_cnt_init(): take "disable_s3" and "disable_s4" Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 26/28] hw/acpi: move "etc/system-states" fw_cfg file from PIIX4 to core Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 27/28] hw/acpi: piix4_pm_init(): take fw_cfg object no more Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 28/28] vhost: logs sharing Michael S. Tsirkin
2015-06-05 11:03 ` [Qemu-devel] [PULL 00/28] pc, acpi, virtio, tpm Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1433416111-19022-14-git-send-email-mst@redhat.com \
--to=mst@redhat.com \
--cc=ehabkost@redhat.com \
--cc=lersek@redhat.com \
--cc=marcel@redhat.com \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=rth@twiddle.net \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).