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From: "Michael S. Tsirkin" <mst@redhat.com>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Eduardo Habkost <ehabkost@redhat.com>,
	Marcel Apfelbaum <marcel@redhat.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Laszlo Ersek <lersek@redhat.com>,
	Richard Henderson <rth@twiddle.net>
Subject: [Qemu-devel] [PULL 22/28] apci: fix PXB behaviour if used with unsupported BIOS
Date: Thu, 4 Jun 2015 13:11:20 +0200	[thread overview]
Message-ID: <1433416111-19022-23-git-send-email-mst@redhat.com> (raw)
In-Reply-To: <1433416111-19022-1-git-send-email-mst@redhat.com>

From: Marcel Apfelbaum <marcel@redhat.com>

PXB does not work with unsupported bioses, but should
not interfere with normal OS operation.
We don't ship them anymore, but it's reasonable
to keep the work-around until we update the bios in qemu.

Fix this by not adding PXB mem/IO chunks to _CRS
if they weren't configured by BIOS.

Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
---
 hw/i386/acpi-build.c | 87 ++++++++++++++++++++++++++++++++++------------------
 1 file changed, 58 insertions(+), 29 deletions(-)

diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 45c36a8..db32fd1 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -786,6 +786,14 @@ static Aml *build_crs(PCIHostState *host,
             range_base = r->addr;
             range_limit = r->addr + r->size - 1;
 
+            /*
+             * Work-around for old bioses
+             * that do not support multiple root buses
+             */
+            if (!range_base || range_base > range_limit) {
+                continue;
+            }
+
             if (r->type & PCI_BASE_ADDRESS_SPACE_IO) {
                 aml_append(crs,
                     aml_word_io(AML_MIN_FIXED, AML_MAX_FIXED,
@@ -819,45 +827,66 @@ static Aml *build_crs(PCIHostState *host,
 
             range_base = pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_IO);
             range_limit = pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_IO);
-            aml_append(crs,
-                aml_word_io(AML_MIN_FIXED, AML_MAX_FIXED,
-                            AML_POS_DECODE, AML_ENTIRE_RANGE,
-                            0,
-                            range_base,
-                            range_limit,
-                            0,
-                            range_limit - range_base + 1));
-            crs_range_insert(io_ranges, range_base, range_limit);
+
+            /*
+             * Work-around for old bioses
+             * that do not support multiple root buses
+             */
+            if (range_base || range_base > range_limit) {
+                aml_append(crs,
+                           aml_word_io(AML_MIN_FIXED, AML_MAX_FIXED,
+                                       AML_POS_DECODE, AML_ENTIRE_RANGE,
+                                       0,
+                                       range_base,
+                                       range_limit,
+                                       0,
+                                       range_limit - range_base + 1));
+                crs_range_insert(io_ranges, range_base, range_limit);
+            }
 
             range_base =
                 pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_MEMORY);
             range_limit =
                 pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_MEMORY);
-            aml_append(crs,
-                aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED,
-                                 AML_MAX_FIXED, AML_NON_CACHEABLE,
-                                 AML_READ_WRITE,
-                                 0,
-                                 range_base,
-                                 range_limit,
-                                 0,
-                                 range_limit - range_base + 1));
-            crs_range_insert(mem_ranges, range_base, range_limit);
+
+            /*
+             * Work-around for old bioses
+             * that do not support multiple root buses
+             */
+            if (range_base || range_base > range_limit) {
+                aml_append(crs,
+                           aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED,
+                                            AML_MAX_FIXED, AML_NON_CACHEABLE,
+                                            AML_READ_WRITE,
+                                            0,
+                                            range_base,
+                                            range_limit,
+                                            0,
+                                            range_limit - range_base + 1));
+                crs_range_insert(mem_ranges, range_base, range_limit);
+          }
 
             range_base =
                 pci_bridge_get_base(dev, PCI_BASE_ADDRESS_MEM_PREFETCH);
             range_limit =
                 pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_MEM_PREFETCH);
-            aml_append(crs,
-                aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED,
-                                 AML_MAX_FIXED, AML_NON_CACHEABLE,
-                                 AML_READ_WRITE,
-                                 0,
-                                 range_base,
-                                 range_limit,
-                                 0,
-                                 range_limit - range_base + 1));
-            crs_range_insert(mem_ranges, range_base, range_limit);
+
+            /*
+             * Work-around for old bioses
+             * that do not support multiple root buses
+             */
+            if (range_base || range_base > range_limit) {
+                aml_append(crs,
+                           aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED,
+                                            AML_MAX_FIXED, AML_NON_CACHEABLE,
+                                            AML_READ_WRITE,
+                                            0,
+                                            range_base,
+                                            range_limit,
+                                            0,
+                                            range_limit - range_base + 1));
+                crs_range_insert(mem_ranges, range_base, range_limit);
+            }
         }
     }
 
-- 
MST

  parent reply	other threads:[~2015-06-04 11:11 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-04 11:10 [Qemu-devel] [PULL 00/28] pc, acpi, virtio, tpm Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 01/28] acpi: add missing ssdt Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 02/28] hw/q35: fix floppy controller definition in ich9 Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 03/28] virtio-pci: don't try to mask or unmask vqs without notifiers Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 04/28] TPM: fix build with tpm disabled Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 05/28] virtio: 64bit features fixups Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 06/28] acpi: add acpi_send_gpe_event() to rise sci for hotplug Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 07/28] acpi: add implementation of aml_while() term Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 08/28] hw/pci: made pci_bus_is_root a PCIBusClass method Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 09/28] hw/pci: made pci_bus_num " Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 10/28] hw/i386: query only for q35/pc when looking for pci host bridge Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 11/28] hw/pci: extend PCI config access to support devices behind PXB Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 12/28] hw/acpi: add support for i440fx 'snooping' root busses Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 13/28] hw/apci: add _PRT method for extra PCI " Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 14/28] hw/acpi: add _CRS method for extra " Michael S. Tsirkin
2015-06-04 11:10 ` [Qemu-devel] [PULL 15/28] hw/acpi: remove from root bus 0 the crs resources used by other buses Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 16/28] hw/pci: removed 'rootbus nr is 0' assumption from qmp_pci_query Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 17/28] hw/pci: introduce PCI Expander Bridge (PXB) Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 18/28] hw/pci: inform bios if the system has extra pci root buses Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 19/28] hw/pxb: add map_irq func Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 20/28] hw/pci: add support for NUMA nodes Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 21/28] hw/pxb: add numa_node parameter Michael S. Tsirkin
2015-06-04 11:11 ` Michael S. Tsirkin [this message]
2015-06-04 11:11 ` [Qemu-devel] [PULL 23/28] docs: Add PXB documentation Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 24/28] pc-dimm: don't assert if pc-dimm alignment != hotpluggable mem range size Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 25/28] hw/acpi: acpi_pm1_cnt_init(): take "disable_s3" and "disable_s4" Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 26/28] hw/acpi: move "etc/system-states" fw_cfg file from PIIX4 to core Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 27/28] hw/acpi: piix4_pm_init(): take fw_cfg object no more Michael S. Tsirkin
2015-06-04 11:11 ` [Qemu-devel] [PULL 28/28] vhost: logs sharing Michael S. Tsirkin
2015-06-05 11:03 ` [Qemu-devel] [PULL 00/28] pc, acpi, virtio, tpm Peter Maydell

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