From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44019) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0jDP-0003k5-3v for qemu-devel@nongnu.org; Fri, 05 Jun 2015 00:26:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z0jDK-0005BN-U8 for qemu-devel@nongnu.org; Fri, 05 Jun 2015 00:26:43 -0400 Received: from e28smtp03.in.ibm.com ([122.248.162.3]:56889) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0jDI-0005Ag-0V for qemu-devel@nongnu.org; Fri, 05 Jun 2015 00:26:38 -0400 Received: from /spool/local by e28smtp03.in.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Fri, 5 Jun 2015 09:56:34 +0530 From: Bharata B Rao Date: Fri, 5 Jun 2015 09:55:55 +0530 Message-Id: <1433478358-993-6-git-send-email-bharata@linux.vnet.ibm.com> In-Reply-To: <1433478358-993-1-git-send-email-bharata@linux.vnet.ibm.com> References: <1433478358-993-1-git-send-email-bharata@linux.vnet.ibm.com> Subject: [Qemu-devel] [PATCH v4 5/8] spapr: Consolidate cpu init code into a routine List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: thuth@redhat.com, aik@ozlabs.ru, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, tyreld@linux.vnet.ibm.com, Bharata B Rao , nfont@linux.vnet.ibm.com, david@gibson.dropbear.id.au Factor out bits of sPAPR specific CPU initialization code into a separate routine so that it can be called from CPU hotplug path too. While at this, use MSR_EP define instead of using 6 directly. Signed-off-by: Bharata B Rao --- hw/ppc/spapr.c | 54 +++++++++++++++++++++++++++++------------------------- 1 file changed, 29 insertions(+), 25 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 65a86eb..a0ecfd1 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1408,6 +1408,34 @@ static void spapr_boot_set(void *opaque, const char *boot_device, machine->boot_order = g_strdup(boot_device); } +static void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu) +{ + CPUPPCState *env = &cpu->env; + + /* Set time-base frequency to 512 MHz */ + cpu_ppc_tb_init(env, TIMEBASE_FREQ); + + /* PAPR always has exception vectors in RAM not ROM. To ensure this, + * MSR[IP] should never be set. + */ + env->msr_mask &= ~(1 << MSR_EP); + + /* Tell KVM that we're in PAPR mode */ + if (kvm_enabled()) { + kvmppc_set_papr(cpu); + } + + if (cpu->max_compat) { + if (ppc_set_compat(cpu, cpu->max_compat) < 0) { + exit(1); + } + } + + xics_cpu_setup(spapr->icp, cpu); + + qemu_register_reset(spapr_cpu_reset, cpu); +} + /* pSeries LPAR / sPAPR hardware init */ static void ppc_spapr_init(MachineState *machine) { @@ -1417,7 +1445,6 @@ static void ppc_spapr_init(MachineState *machine) const char *kernel_cmdline = machine->kernel_cmdline; const char *initrd_filename = machine->initrd_filename; PowerPCCPU *cpu; - CPUPPCState *env; PCIHostState *phb; int i; MemoryRegion *sysmem = get_system_memory(); @@ -1501,30 +1528,7 @@ static void ppc_spapr_init(MachineState *machine) fprintf(stderr, "Unable to find PowerPC CPU definition\n"); exit(1); } - env = &cpu->env; - - /* Set time-base frequency to 512 MHz */ - cpu_ppc_tb_init(env, TIMEBASE_FREQ); - - /* PAPR always has exception vectors in RAM not ROM. To ensure this, - * MSR[IP] should never be set. - */ - env->msr_mask &= ~(1 << 6); - - /* Tell KVM that we're in PAPR mode */ - if (kvm_enabled()) { - kvmppc_set_papr(cpu); - } - - if (cpu->max_compat) { - if (ppc_set_compat(cpu, cpu->max_compat) < 0) { - exit(1); - } - } - - xics_cpu_setup(spapr->icp, cpu); - - qemu_register_reset(spapr_cpu_reset, cpu); + spapr_cpu_init(spapr, cpu); } if (kvm_enabled()) { -- 2.1.0