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From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 42/62] target-i386: set G=1 in SMM big real mode selectors
Date: Fri,  5 Jun 2015 17:15:43 +0200	[thread overview]
Message-ID: <1433517363-32335-43-git-send-email-pbonzini@redhat.com> (raw)
In-Reply-To: <1433517363-32335-1-git-send-email-pbonzini@redhat.com>

Because the limit field's bits 31:20 is 1, G should be 1.
VMX actually enforces this, let's do it for completeness
in QEMU as well.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 target-i386/smm_helper.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/target-i386/smm_helper.c b/target-i386/smm_helper.c
index 6207c3a..5617a14 100644
--- a/target-i386/smm_helper.c
+++ b/target-i386/smm_helper.c
@@ -177,22 +177,22 @@ void do_smm_enter(X86CPU *cpu)
     cpu_x86_load_seg_cache(env, R_CS, (env->smbase >> 4) & 0xffff, env->smbase,
                            0xffffffff,
                            DESC_P_MASK | DESC_S_MASK | DESC_W_MASK |
-                           DESC_A_MASK);
+                           DESC_G_MASK | DESC_A_MASK);
     cpu_x86_load_seg_cache(env, R_DS, 0, 0, 0xffffffff,
                            DESC_P_MASK | DESC_S_MASK | DESC_W_MASK |
-                           DESC_A_MASK);
+                           DESC_G_MASK | DESC_A_MASK);
     cpu_x86_load_seg_cache(env, R_ES, 0, 0, 0xffffffff,
                            DESC_P_MASK | DESC_S_MASK | DESC_W_MASK |
-                           DESC_A_MASK);
+                           DESC_G_MASK | DESC_A_MASK);
     cpu_x86_load_seg_cache(env, R_SS, 0, 0, 0xffffffff,
                            DESC_P_MASK | DESC_S_MASK | DESC_W_MASK |
-                           DESC_A_MASK);
+                           DESC_G_MASK | DESC_A_MASK);
     cpu_x86_load_seg_cache(env, R_FS, 0, 0, 0xffffffff,
                            DESC_P_MASK | DESC_S_MASK | DESC_W_MASK |
-                           DESC_A_MASK);
+                           DESC_G_MASK | DESC_A_MASK);
     cpu_x86_load_seg_cache(env, R_GS, 0, 0, 0xffffffff,
                            DESC_P_MASK | DESC_S_MASK | DESC_W_MASK |
-                           DESC_A_MASK);
+                           DESC_G_MASK | DESC_A_MASK);
 }
 
 void helper_rsm(CPUX86State *env)
-- 
2.4.1

  parent reply	other threads:[~2015-06-05 15:17 UTC|newest]

Thread overview: 70+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-05 15:15 [Qemu-devel] [PULL 00/62] KVM, dirty bitmap, build system, SMM, icount changes for 2015-06-05 Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 01/62] Move parallel_hds_isa_init to hw/isa/isa-bus.c Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 02/62] ppc: add helpful message when KVM fails to start VCPU Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 03/62] qemu-nbd: Switch to qemu_set_fd_handler Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 04/62] exec: optimize phys_page_set_level Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 05/62] Makefile.target: set master BUILD_DIR Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 06/62] memory: the only dirty memory flag for users is DIRTY_MEMORY_VGA Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 07/62] g364fb: remove pointless call to memory_region_set_coalescing Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 08/62] display: enable DIRTY_MEMORY_VGA tracking explicitly Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 09/62] display: add memory_region_sync_dirty_bitmap calls Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 10/62] memory: differentiate memory_region_is_logging and memory_region_get_dirty_log_mask Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 11/62] memory: prepare for multiple bits in the dirty log mask Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 12/62] framebuffer: check memory_region_is_logging Paolo Bonzini
2015-07-10 15:44   ` Peter Maydell
2015-07-12 14:09     ` Paolo Bonzini
2015-07-12 22:02       ` Peter Maydell
2015-07-13  6:48         ` Paolo Bonzini
2015-07-13  8:55           ` Peter Maydell
2015-07-13 10:15             ` Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 13/62] ui/console: remove dpy_gfx_update_dirty Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 14/62] memory: track DIRTY_MEMORY_CODE in mr->dirty_log_mask Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 15/62] kvm: accept non-mapped memory in kvm_dirty_pages_log_change Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 16/62] memory: include DIRTY_MEMORY_MIGRATION in the dirty log mask Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 17/62] kvm: remove special handling of " Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 18/62] ram_addr: tweaks to xen_modified_memory Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 19/62] exec: use memory_region_get_dirty_log_mask to optimize dirty tracking Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 20/62] exec: move functions to translate-all.h Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 21/62] translate-all: remove unnecessary argument to tb_invalidate_phys_range Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 22/62] cputlb: remove useless arguments to tlb_unprotect_code_phys, rename Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 23/62] translate-all: make less of tb_invalidate_phys_page_range depend on is_cpu_write_access Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 24/62] exec: pass client mask to cpu_physical_memory_set_dirty_range Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 25/62] exec: invert return value of cpu_physical_memory_get_clean, rename Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 26/62] exec: only check relevant bitmaps for cleanliness Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 27/62] memory: do not touch code dirty bitmap unless TCG is enabled Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 28/62] bitmap: add atomic set functions Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 29/62] bitmap: add atomic test and clear Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 30/62] memory: use atomic ops for setting dirty memory bits Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 31/62] migration: move dirty bitmap sync to ram_addr.h Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 32/62] memory: replace cpu_physical_memory_reset_dirty() with test-and-clear Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 33/62] memory: make cpu_physical_memory_sync_dirty_bitmap() fully atomic Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 34/62] memory: use mr->ram_addr in "is this RAM?" assertions Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 35/62] icount: implement a new icount_sleep mode toggleing real-time cpu sleep Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 36/62] icount: add sleep parameter to the icount option to set icount_sleep mode Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 37/62] icount: print a warning if there is no more deadline in sleep=no mode Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 38/62] target-i386: introduce cpu_get_mem_attrs Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 39/62] target-i386: Use correct memory attributes for memory accesses Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 40/62] target-i386: Use correct memory attributes for ioport accesses Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 41/62] target-i386: mask NMIs on entry to SMM Paolo Bonzini
2015-06-05 15:15 ` Paolo Bonzini [this message]
2015-06-05 15:15 ` [Qemu-devel] [PULL 43/62] target-i386: wake up processors that receive an SMI Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 44/62] pflash_cfi01: change big-endian property to BIT type Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 45/62] pflash_cfi01: change to new-style MMIO accessors Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 46/62] pflash_cfi01: add secure property Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 47/62] vl: allow full-blown QemuOpts syntax for -global Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 48/62] qom: add object_property_add_const_link Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 49/62] vl: run "late" notifiers immediately Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 50/62] target-i386: create a separate AddressSpace for each CPU Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 51/62] hw/i386: add a separate region that tracks the SMRAME bit Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 52/62] target-i386: use memory API to implement SMRAM Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 53/62] hw/i386: remove smram_update Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 54/62] q35: implement high SMRAM Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 55/62] q35: fix ESMRAMC default Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 56/62] q35: add config space wmask for SMRAM and ESMRAMC Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 57/62] q35: implement SMRAM.D_LCK Paolo Bonzini
2015-06-05 15:15 ` [Qemu-devel] [PULL 58/62] q35: add test for SMRAM.D_LCK Paolo Bonzini
2015-06-05 15:16 ` [Qemu-devel] [PULL 59/62] q35: implement TSEG Paolo Bonzini
2015-06-05 15:16 ` [Qemu-devel] [PULL 60/62] ich9: implement SMI_LOCK Paolo Bonzini
2015-06-05 15:16 ` [Qemu-devel] [PULL 61/62] atomics: add explicit compiler fence in __atomic memory barriers Paolo Bonzini
2015-06-05 15:16 ` [Qemu-devel] [PULL 62/62] update Linux headers from kvm/next Paolo Bonzini
2015-06-05 15:30 ` [Qemu-devel] [PULL 00/62] KVM, dirty bitmap, build system, SMM, icount changes for 2015-06-05 Paolo Bonzini

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