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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 3/3] target-alpha: Inline hw_ret
Date: Tue,  9 Jun 2015 14:13:09 -0700	[thread overview]
Message-ID: <1433884389-2643-4-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1433884389-2643-1-git-send-email-rth@twiddle.net>

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-alpha/helper.h     |  2 --
 target-alpha/sys_helper.c |  8 --------
 target-alpha/translate.c  | 15 ++++++++++-----
 3 files changed, 10 insertions(+), 15 deletions(-)

diff --git a/target-alpha/helper.h b/target-alpha/helper.h
index e7f0450..42bb247 100644
--- a/target-alpha/helper.h
+++ b/target-alpha/helper.h
@@ -91,8 +91,6 @@ DEF_HELPER_FLAGS_2(ieee_input_cmp, TCG_CALL_NO_WG, void, env, i64)
 DEF_HELPER_FLAGS_2(ieee_input_s, TCG_CALL_NO_WG, void, env, i64)
 
 #if !defined (CONFIG_USER_ONLY)
-DEF_HELPER_2(hw_ret, void, env, i64)
-
 DEF_HELPER_2(ldl_phys, i64, env, i64)
 DEF_HELPER_2(ldq_phys, i64, env, i64)
 DEF_HELPER_2(ldl_l_phys, i64, env, i64)
diff --git a/target-alpha/sys_helper.c b/target-alpha/sys_helper.c
index 211991d..22e5b08 100644
--- a/target-alpha/sys_helper.c
+++ b/target-alpha/sys_helper.c
@@ -40,14 +40,6 @@ uint64_t helper_load_pcc(CPUAlphaState *env)
 
 /* PALcode support special instructions */
 #ifndef CONFIG_USER_ONLY
-void helper_hw_ret(CPUAlphaState *env, uint64_t a)
-{
-    env->pc = a & ~3;
-    env->intr_flag = 0;
-    env->lock_addr = -1;
-    env->pal_mode = a & 1;
-}
-
 void helper_tbia(CPUAlphaState *env)
 {
     tlb_flush(CPU(alpha_env_get_cpu(env)), 1);
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 04c42fc..82d492b 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -2635,13 +2635,18 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
             /* Pre-EV6 CPUs interpreted this as HW_REI, loading the return
                address from EXC_ADDR.  This turns out to be useful for our
                emulation PALcode, so continue to accept it.  */
-            tmp = tcg_temp_new();
-            tcg_gen_ld_i64(tmp, cpu_env, offsetof(CPUAlphaState, exc_addr));
-            gen_helper_hw_ret(cpu_env, tmp);
-            tcg_temp_free(tmp);
+            ctx->lit = vb = tcg_temp_new();
+            tcg_gen_ld_i64(vb, cpu_env, offsetof(CPUAlphaState, exc_addr));
         } else {
-            gen_helper_hw_ret(cpu_env, load_gpr(ctx, rb));
+            vb = load_gpr(ctx, rb);
         }
+        tmp = tcg_temp_new();
+        tcg_gen_movi_i64(tmp, 0);
+        tcg_gen_st8_i64(tmp, cpu_env, offsetof(CPUAlphaState, intr_flag));
+        tcg_gen_movi_i64(cpu_lock_addr, -1);
+        tcg_gen_andi_i64(tmp, vb, 1);
+        tcg_gen_st8_i64(tmp, cpu_env, offsetof(CPUAlphaState, pal_mode));
+        tcg_gen_andi_i64(cpu_pc, vb, ~3);
         ret = EXIT_PC_UPDATED;
         break;
 #else
-- 
2.1.0

  parent reply	other threads:[~2015-06-09 21:13 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-09 21:13 [Qemu-devel] [PATCH 0/3] target-alpha PALcode improvements Richard Henderson
2015-06-09 21:13 ` [Qemu-devel] [PATCH 1/3] target-alpha: Use separate TCGv temporaries for the shadow registers Richard Henderson
2015-06-09 21:13 ` [Qemu-devel] [PATCH 2/3] target-alpha: Inline call_pal Richard Henderson
2015-06-09 21:13 ` Richard Henderson [this message]
2015-06-12 22:12 ` [Qemu-devel] [PATCH 0/3] target-alpha PALcode improvements Aurelien Jarno
  -- strict thread matches above, loose matches on Subject: below --
2015-06-09 21:12 Richard Henderson
2015-06-09 21:12 ` [Qemu-devel] [PATCH 3/3] target-alpha: Inline hw_ret Richard Henderson

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