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From: Leon Alrae <leon.alrae@imgtec.com>
To: qemu-devel@nongnu.org
Cc: "Hervé Poussineau" <hpoussin@reactos.org>,
	"Laurent Vivier" <laurent@vivier.eu>
Subject: [Qemu-devel] [PULL 18/29] net/dp8393x: QOM'ify
Date: Fri, 12 Jun 2015 10:35:25 +0100	[thread overview]
Message-ID: <1434101736-11558-19-git-send-email-leon.alrae@imgtec.com> (raw)
In-Reply-To: <1434101736-11558-1-git-send-email-leon.alrae@imgtec.com>

From: Hervé Poussineau <hpoussin@reactos.org>

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
---
 hw/mips/mips_jazz.c    | 12 ++++++--
 hw/net/dp8393x.c       | 83 ++++++++++++++++++++++++++++++++++----------------
 include/hw/mips/mips.h |  5 ---
 3 files changed, 67 insertions(+), 33 deletions(-)

diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c
index 29a13c0..648654e 100644
--- a/hw/mips/mips_jazz.c
+++ b/hw/mips/mips_jazz.c
@@ -273,8 +273,16 @@ static void mips_jazz_init(MachineState *machine,
         if (!nd->model)
             nd->model = g_strdup("dp83932");
         if (strcmp(nd->model, "dp83932") == 0) {
-            dp83932_init(nd, 0x80001000, 2, get_system_memory(),
-                         qdev_get_gpio_in(rc4030, 4), rc4030_dma_mr);
+            qemu_check_nic_model(nd, "dp83932");
+
+            dev = qdev_create(NULL, "dp8393x");
+            qdev_set_nic_properties(dev, nd);
+            qdev_prop_set_uint8(dev, "it_shift", 2);
+            qdev_prop_set_ptr(dev, "dma_mr", rc4030_dma_mr);
+            qdev_init_nofail(dev);
+            sysbus = SYS_BUS_DEVICE(dev);
+            sysbus_mmio_map(sysbus, 0, 0x80001000);
+            sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(rc4030, 4));
             break;
         } else if (is_help_option(nd->model)) {
             fprintf(stderr, "qemu: Supported NICs: dp83932\n");
diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c
index 0aff04f..51e728b 100644
--- a/hw/net/dp8393x.c
+++ b/hw/net/dp8393x.c
@@ -17,10 +17,10 @@
  * with this program; if not, see <http://www.gnu.org/licenses/>.
  */
 
-#include "hw/hw.h"
-#include "qemu/timer.h"
+#include "hw/sysbus.h"
+#include "hw/devices.h"
 #include "net/net.h"
-#include "hw/mips/mips.h"
+#include "qemu/timer.h"
 #include <zlib.h>
 
 //#define DEBUG_SONIC
@@ -139,9 +139,14 @@ do { printf("sonic ERROR: %s: " fmt, __func__ , ## __VA_ARGS__); } while (0)
 #define SONIC_ISR_PINT   0x0800
 #define SONIC_ISR_LCD    0x1000
 
+#define TYPE_DP8393X "dp8393x"
+#define DP8393X(obj) OBJECT_CHECK(dp8393xState, (obj), TYPE_DP8393X)
+
 typedef struct dp8393xState {
+    SysBusDevice parent_obj;
+
     /* Hardware */
-    int it_shift;
+    uint8_t it_shift;
     qemu_irq irq;
 #ifdef DEBUG_SONIC
     int irq_level;
@@ -150,7 +155,6 @@ typedef struct dp8393xState {
     int64_t wt_last_update;
     NICConf conf;
     NICState *nic;
-    MemoryRegion *address_space;
     MemoryRegion mmio;
 
     /* Registers */
@@ -162,6 +166,7 @@ typedef struct dp8393xState {
     int loopback_packet;
 
     /* Memory access */
+    void *dma_mr;
     AddressSpace as;
 } dp8393xState;
 
@@ -774,9 +779,9 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
     return size;
 }
 
-static void dp8393x_reset(void *opaque)
+static void dp8393x_reset(DeviceState *dev)
 {
-    dp8393xState *s = opaque;
+    dp8393xState *s = DP8393X(dev);
     timer_del(s->watchdog);
 
     s->regs[SONIC_CR] = SONIC_CR_RST | SONIC_CR_STP | SONIC_CR_RXDIS;
@@ -805,33 +810,59 @@ static NetClientInfo net_dp83932_info = {
     .receive = dp8393x_receive,
 };
 
-void dp83932_init(NICInfo *nd, hwaddr base, int it_shift,
-                  MemoryRegion *address_space,
-                  qemu_irq irq, MemoryRegion *dma_mr)
+static void dp8393x_instance_init(Object *obj)
 {
-    dp8393xState *s;
+    SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+    dp8393xState *s = DP8393X(obj);
 
-    qemu_check_nic_model(nd, "dp83932");
+    sysbus_init_mmio(sbd, &s->mmio);
+    sysbus_init_irq(sbd, &s->irq);
+}
+
+static void dp8393x_realize(DeviceState *dev, Error **errp)
+{
+    dp8393xState *s = DP8393X(dev);
 
-    s = g_malloc0(sizeof(dp8393xState));
+    address_space_init(&s->as, s->dma_mr, "dp8393x");
+    memory_region_init_io(&s->mmio, OBJECT(dev), &dp8393x_ops, s,
+                          "dp8393x-regs", 0x40 << s->it_shift);
+
+    s->nic = qemu_new_nic(&net_dp83932_info, &s->conf,
+                          object_get_typename(OBJECT(dev)), dev->id, s);
+    qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a);
 
-    s->address_space = address_space;
-    address_space_init(&s->as, dma_mr, "dp8393x-dma");
-    s->it_shift = it_shift;
-    s->irq = irq;
     s->watchdog = timer_new_ns(QEMU_CLOCK_VIRTUAL, dp8393x_watchdog, s);
     s->regs[SONIC_SR] = 0x0004; /* only revision recognized by Linux */
+}
 
-    s->conf.macaddr = nd->macaddr;
-    s->conf.peers.ncs[0] = nd->netdev;
+static Property dp8393x_properties[] = {
+    DEFINE_NIC_PROPERTIES(dp8393xState, conf),
+    DEFINE_PROP_PTR("dma_mr", dp8393xState, dma_mr),
+    DEFINE_PROP_UINT8("it_shift", dp8393xState, it_shift, 0),
+    DEFINE_PROP_END_OF_LIST(),
+};
 
-    s->nic = qemu_new_nic(&net_dp83932_info, &s->conf, nd->model, nd->name, s);
+static void dp8393x_class_init(ObjectClass *klass, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(klass);
 
-    qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a);
-    qemu_register_reset(dp8393x_reset, s);
-    dp8393x_reset(s);
+    set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
+    dc->realize = dp8393x_realize;
+    dc->reset = dp8393x_reset;
+    dc->props = dp8393x_properties;
+}
 
-    memory_region_init_io(&s->mmio, NULL, &dp8393x_ops, s,
-                          "dp8393x", 0x40 << it_shift);
-    memory_region_add_subregion(address_space, base, &s->mmio);
+static const TypeInfo dp8393x_info = {
+    .name          = TYPE_DP8393X,
+    .parent        = TYPE_SYS_BUS_DEVICE,
+    .instance_size = sizeof(dp8393xState),
+    .instance_init = dp8393x_instance_init,
+    .class_init    = dp8393x_class_init,
+};
+
+static void dp8393x_register_types(void)
+{
+    type_register_static(&dp8393x_info);
 }
+
+type_init(dp8393x_register_types)
diff --git a/include/hw/mips/mips.h b/include/hw/mips/mips.h
index 31b4729..e0065ce 100644
--- a/include/hw/mips/mips.h
+++ b/include/hw/mips/mips.h
@@ -20,9 +20,4 @@ void rc4030_dma_write(void *dma, uint8_t *buf, int len);
 
 DeviceState *rc4030_init(rc4030_dma **dmas, MemoryRegion **dma_mr);
 
-/* dp8393x.c */
-void dp83932_init(NICInfo *nd, hwaddr base, int it_shift,
-                  MemoryRegion *address_space,
-                  qemu_irq irq, MemoryRegion *dma_mr);
-
 #endif
-- 
2.1.0

  parent reply	other threads:[~2015-06-12  9:37 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-12  9:35 [Qemu-devel] [PULL 00/29] target-mips queue Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 01/29] target-mips: move group of functions above gen_load_fpr32() Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 02/29] target-mips: add Config5.FRE support allowing Status.FR=0 emulation Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 03/29] mips_malta: provide ememsize env variable to kernels Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 04/29] target-mips: Misaligned memory accesses for R6 Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 05/29] softmmu: Add probe_write() Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 06/29] target-mips: Misaligned memory accesses for MSA Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 07/29] target-mips: add ERETNC instruction and Config5.LLB bit Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 08/29] mips jazz: compile only in 64 bit Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 09/29] dma/rc4030: create custom DMA address space Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 10/29] dma/rc4030: use AddressSpace and address_space_rw in users Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 11/29] dma/rc4030: do not use old_mmio accesses Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 12/29] dma/rc4030: document register at offset 0x210 Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 13/29] dma/rc4030: use trace events instead of custom logging Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 14/29] dma/rc4030: convert to QOM Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 15/29] net/dp8393x: always calculate proper checksums Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 16/29] net/dp8393x: do not use old_mmio accesses Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 17/29] net/dp8393x: use dp8393x_ prefix for all functions Leon Alrae
2015-06-12  9:35 ` Leon Alrae [this message]
2015-06-12  9:35 ` [Qemu-devel] [PULL 19/29] net/dp8393x: add PROM to store MAC address Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 20/29] net/dp8393x: add load/save support Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 21/29] net/dp8393x: correctly reset in_use field Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 22/29] net/dp8393x: fix hardware reset Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 23/29] target-mips: correct MFC0 for CP0.EntryLo in MIPS64 Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 24/29] target-mips: extend selected CP0 registers to 64-bits in MIPS32 Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 25/29] target-mips: support Page Frame Number Extension field Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 26/29] target-mips: add CP0.PageGrain.ELPA support Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 27/29] target-mips: add MTHC0 and MFHC0 instructions Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 28/29] target-mips: remove misleading comments in translate_init.c Leon Alrae
2015-06-12  9:35 ` [Qemu-devel] [PULL 29/29] target-mips: enable XPA and LPA features Leon Alrae
2015-06-12 13:30 ` [Qemu-devel] [PULL 00/29] target-mips queue Peter Maydell

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