From: Leon Alrae <leon.alrae@imgtec.com>
To: qemu-devel@nongnu.org
Cc: Aurelien Jarno <aurelien@aurel32.net>,
Paul Burton <paul.burton@imgtec.com>
Subject: [Qemu-devel] [PULL 03/29] mips_malta: provide ememsize env variable to kernels
Date: Fri, 12 Jun 2015 10:35:10 +0100 [thread overview]
Message-ID: <1434101736-11558-4-git-send-email-leon.alrae@imgtec.com> (raw)
In-Reply-To: <1434101736-11558-1-git-send-email-leon.alrae@imgtec.com>
From: Paul Burton <paul.burton@imgtec.com>
Commit 94c2b6aff43c (mips_malta: support up to 2GiB RAM) provided
support for using over 256MB of RAM with the MIPS Malta board, including
capping the memsize variable that QEMUs pseudo-bootloader provides to
the kernel at 256MB in order to match YAMON. It didn't however provide
the ememsize variable which kernels supporting memory outside of the
unmapped address spaces (ie. EVA or highmem) may use to determine the
true size of the RAM present in the system.
Set ememsize to the size of RAM so that such kernels may use all
available memory without the user having to manually specifying its size
& location.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
---
hw/mips/mips_malta.c | 15 +++++++++------
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index 5140882..786a8f0 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -97,7 +97,7 @@ typedef struct {
static ISADevice *pit;
static struct _loaderparams {
- int ram_size;
+ int ram_size, ram_low_size;
const char *kernel_filename;
const char *kernel_cmdline;
const char *initrd_filename;
@@ -641,8 +641,8 @@ static void write_bootloader (CPUMIPSState *env, uint8_t *base,
stl_p(p++, 0x34a50000 | (ENVP_ADDR & 0xffff)); /* ori a1, a1, low(ENVP_ADDR) */
stl_p(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff)); /* lui a2, high(ENVP_ADDR + 8) */
stl_p(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff)); /* ori a2, a2, low(ENVP_ADDR + 8) */
- stl_p(p++, 0x3c070000 | (loaderparams.ram_size >> 16)); /* lui a3, high(ram_size) */
- stl_p(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff)); /* ori a3, a3, low(ram_size) */
+ stl_p(p++, 0x3c070000 | (loaderparams.ram_low_size >> 16)); /* lui a3, high(ram_low_size) */
+ stl_p(p++, 0x34e70000 | (loaderparams.ram_low_size & 0xffff)); /* ori a3, a3, low(ram_low_size) */
/* Load BAR registers as done by YAMON */
stl_p(p++, 0x3c09b400); /* lui t1, 0xb400 */
@@ -851,8 +851,10 @@ static int64_t load_kernel (void)
}
prom_set(prom_buf, prom_index++, "memsize");
- prom_set(prom_buf, prom_index++, "%i",
- MIN(loaderparams.ram_size, 256 << 20));
+ prom_set(prom_buf, prom_index++, "%u", loaderparams.ram_low_size);
+
+ prom_set(prom_buf, prom_index++, "ememsize");
+ prom_set(prom_buf, prom_index++, "%u", loaderparams.ram_size);
prom_set(prom_buf, prom_index++, "modetty0");
prom_set(prom_buf, prom_index++, "38400n8r");
@@ -1054,7 +1056,8 @@ void mips_malta_init(MachineState *machine)
}
/* Write a small bootloader to the flash location. */
- loaderparams.ram_size = ram_low_size;
+ loaderparams.ram_size = ram_size;
+ loaderparams.ram_low_size = ram_low_size;
loaderparams.kernel_filename = kernel_filename;
loaderparams.kernel_cmdline = kernel_cmdline;
loaderparams.initrd_filename = initrd_filename;
--
2.1.0
next prev parent reply other threads:[~2015-06-12 9:36 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-12 9:35 [Qemu-devel] [PULL 00/29] target-mips queue Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 01/29] target-mips: move group of functions above gen_load_fpr32() Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 02/29] target-mips: add Config5.FRE support allowing Status.FR=0 emulation Leon Alrae
2015-06-12 9:35 ` Leon Alrae [this message]
2015-06-12 9:35 ` [Qemu-devel] [PULL 04/29] target-mips: Misaligned memory accesses for R6 Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 05/29] softmmu: Add probe_write() Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 06/29] target-mips: Misaligned memory accesses for MSA Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 07/29] target-mips: add ERETNC instruction and Config5.LLB bit Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 08/29] mips jazz: compile only in 64 bit Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 09/29] dma/rc4030: create custom DMA address space Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 10/29] dma/rc4030: use AddressSpace and address_space_rw in users Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 11/29] dma/rc4030: do not use old_mmio accesses Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 12/29] dma/rc4030: document register at offset 0x210 Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 13/29] dma/rc4030: use trace events instead of custom logging Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 14/29] dma/rc4030: convert to QOM Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 15/29] net/dp8393x: always calculate proper checksums Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 16/29] net/dp8393x: do not use old_mmio accesses Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 17/29] net/dp8393x: use dp8393x_ prefix for all functions Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 18/29] net/dp8393x: QOM'ify Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 19/29] net/dp8393x: add PROM to store MAC address Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 20/29] net/dp8393x: add load/save support Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 21/29] net/dp8393x: correctly reset in_use field Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 22/29] net/dp8393x: fix hardware reset Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 23/29] target-mips: correct MFC0 for CP0.EntryLo in MIPS64 Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 24/29] target-mips: extend selected CP0 registers to 64-bits in MIPS32 Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 25/29] target-mips: support Page Frame Number Extension field Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 26/29] target-mips: add CP0.PageGrain.ELPA support Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 27/29] target-mips: add MTHC0 and MFHC0 instructions Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 28/29] target-mips: remove misleading comments in translate_init.c Leon Alrae
2015-06-12 9:35 ` [Qemu-devel] [PULL 29/29] target-mips: enable XPA and LPA features Leon Alrae
2015-06-12 13:30 ` [Qemu-devel] [PULL 00/29] target-mips queue Peter Maydell
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