From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38650) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z3MOF-0003hV-I7 for qemu-devel@nongnu.org; Fri, 12 Jun 2015 06:40:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z3MOC-0002xd-TL for qemu-devel@nongnu.org; Fri, 12 Jun 2015 06:40:47 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:101::1]:56266) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z3MOC-0002wl-Mc for qemu-devel@nongnu.org; Fri, 12 Jun 2015 06:40:44 -0400 From: Aurelien Jarno Date: Fri, 12 Jun 2015 12:40:37 +0200 Message-Id: <1434105638-642-11-git-send-email-aurelien@aurel32.net> In-Reply-To: <1434105638-642-1-git-send-email-aurelien@aurel32.net> References: <1434105638-642-1-git-send-email-aurelien@aurel32.net> Subject: [Qemu-devel] [PULL 10/11] target-sh4: factorize fmov implementation List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Aurelien Jarno Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- target-sh4/translate.c | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 44d0e94..e8b9217 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -1010,24 +1010,19 @@ static void _decode_opc(DisasContext * ctx) return; case 0xf00b: /* fmov {F,D,X}Rm,@-Rn - FPSCR: Nothing */ CHECK_FPU_ENABLED + TCGv addr = tcg_temp_new_i32(); + tcg_gen_subi_i32(addr, REG(B11_8), 4); if (ctx->flags & FPSCR_SZ) { - TCGv addr = tcg_temp_new_i32(); int fr = XREG(B7_4); - tcg_gen_subi_i32(addr, REG(B11_8), 4); tcg_gen_qemu_st_i32(cpu_fregs[fr+1], addr, ctx->memidx, MO_TEUL); tcg_gen_subi_i32(addr, addr, 4); tcg_gen_qemu_st_i32(cpu_fregs[fr], addr, ctx->memidx, MO_TEUL); - tcg_gen_mov_i32(REG(B11_8), addr); - tcg_temp_free(addr); } else { - TCGv addr; - addr = tcg_temp_new_i32(); - tcg_gen_subi_i32(addr, REG(B11_8), 4); tcg_gen_qemu_st_i32(cpu_fregs[FREG(B7_4)], addr, ctx->memidx, MO_TEUL); - tcg_gen_mov_i32(REG(B11_8), addr); - tcg_temp_free(addr); } + tcg_gen_mov_i32(REG(B11_8), addr); + tcg_temp_free(addr); return; case 0xf006: /* fmov @(R0,Rm),{F,D,X}Rm - FPSCR: Nothing */ CHECK_FPU_ENABLED -- 2.1.4