From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Cc: Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PULL 03/11] sh4/r2d: convert to new MMIO accessor style
Date: Fri, 12 Jun 2015 12:40:30 +0200 [thread overview]
Message-ID: <1434105638-642-4-git-send-email-aurelien@aurel32.net> (raw)
In-Reply-To: <1434105638-642-1-git-send-email-aurelien@aurel32.net>
The documentation is clear to use 16-bit accesses for all registers.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
hw/sh4/r2d.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c
index 4221060..5e22ed7 100644
--- a/hw/sh4/r2d.c
+++ b/hw/sh4/r2d.c
@@ -127,7 +127,7 @@ static void r2d_fpga_irq_set(void *opaque, int n, int level)
update_irl(fpga);
}
-static uint32_t r2d_fpga_read(void *opaque, hwaddr addr)
+static uint64_t r2d_fpga_read(void *opaque, hwaddr addr, unsigned int size)
{
r2d_fpga_t *s = opaque;
@@ -146,7 +146,7 @@ static uint32_t r2d_fpga_read(void *opaque, hwaddr addr)
}
static void
-r2d_fpga_write(void *opaque, hwaddr addr, uint32_t value)
+r2d_fpga_write(void *opaque, hwaddr addr, uint64_t value, unsigned int size)
{
r2d_fpga_t *s = opaque;
@@ -170,10 +170,10 @@ r2d_fpga_write(void *opaque, hwaddr addr, uint32_t value)
}
static const MemoryRegionOps r2d_fpga_ops = {
- .old_mmio = {
- .read = { r2d_fpga_read, r2d_fpga_read, NULL, },
- .write = { r2d_fpga_write, r2d_fpga_write, NULL, },
- },
+ .read = r2d_fpga_read,
+ .write = r2d_fpga_write,
+ .impl.min_access_size = 2,
+ .impl.max_access_size = 2,
.endianness = DEVICE_NATIVE_ENDIAN,
};
--
2.1.4
next prev parent reply other threads:[~2015-06-12 10:40 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-12 10:40 [Qemu-devel] [PULL 00/11] sh4-next queue Aurelien Jarno
2015-06-12 10:40 ` [Qemu-devel] [PULL 01/11] linux-user: Default sh4 to sh7785 Aurelien Jarno
2015-06-12 10:40 ` [Qemu-devel] [PULL 02/11] linux-user: Add HWCAP for SH4 Aurelien Jarno
2015-06-12 10:40 ` Aurelien Jarno [this message]
2015-06-12 10:40 ` [Qemu-devel] [PULL 04/11] target-sh4: use bit number for SR constants Aurelien Jarno
2015-06-12 10:40 ` [Qemu-devel] [PULL 05/11] target-sh4: Split out T from SR Aurelien Jarno
2015-06-12 10:40 ` [Qemu-devel] [PULL 06/11] target-sh4: optimize addc using add2 Aurelien Jarno
2015-06-12 10:40 ` [Qemu-devel] [PULL 07/11] target-sh4: optimize subc using sub2 Aurelien Jarno
2015-06-12 10:40 ` [Qemu-devel] [PULL 08/11] target-sh4: optimize negc using add2 and sub2 Aurelien Jarno
2015-06-12 10:40 ` [Qemu-devel] [PULL 09/11] target-sh4: split out Q and M from of SR and optimize div1 Aurelien Jarno
2015-06-12 10:40 ` [Qemu-devel] [PULL 10/11] target-sh4: factorize fmov implementation Aurelien Jarno
2015-06-12 10:40 ` [Qemu-devel] [PULL 11/11] target-sh4: remove dead code Aurelien Jarno
2015-06-12 14:38 ` [Qemu-devel] [PULL 00/11] sh4-next queue Peter Maydell
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