From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38600) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z3MOD-0003hO-QC for qemu-devel@nongnu.org; Fri, 12 Jun 2015 06:40:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z3MOC-0002wt-MY for qemu-devel@nongnu.org; Fri, 12 Jun 2015 06:40:45 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:101::1]:56258) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z3MOC-0002wW-Gj for qemu-devel@nongnu.org; Fri, 12 Jun 2015 06:40:44 -0400 From: Aurelien Jarno Date: Fri, 12 Jun 2015 12:40:34 +0200 Message-Id: <1434105638-642-8-git-send-email-aurelien@aurel32.net> In-Reply-To: <1434105638-642-1-git-send-email-aurelien@aurel32.net> References: <1434105638-642-1-git-send-email-aurelien@aurel32.net> Subject: [Qemu-devel] [PULL 07/11] target-sh4: optimize subc using sub2 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Aurelien Jarno Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- target-sh4/translate.c | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 5c90fe3..b8abfd5 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -880,19 +880,15 @@ static void _decode_opc(DisasContext * ctx) return; case 0x300a: /* subc Rm,Rn */ { - TCGv t0, t1, t2; - t0 = tcg_temp_new(); + TCGv t0, t1; + t0 = tcg_const_tl(0); t1 = tcg_temp_new(); - tcg_gen_sub_i32(t1, REG(B11_8), REG(B7_4)); - tcg_gen_sub_i32(t0, t1, cpu_sr_t); - t2 = tcg_temp_new(); - tcg_gen_setcond_i32(TCG_COND_LTU, t2, REG(B11_8), t1); - tcg_gen_setcond_i32(TCG_COND_LTU, t1, t1, t0); - tcg_gen_or_i32(cpu_sr_t, t1, t2); - tcg_temp_free(t2); - tcg_temp_free(t1); - tcg_gen_mov_i32(REG(B11_8), t0); + tcg_gen_add2_i32(t1, cpu_sr_t, cpu_sr_t, t0, REG(B7_4), t0); + tcg_gen_sub2_i32(REG(B11_8), cpu_sr_t, + REG(B11_8), t0, t1, cpu_sr_t); + tcg_gen_andi_i32(cpu_sr_t, cpu_sr_t, 1); tcg_temp_free(t0); + tcg_temp_free(t1); } return; case 0x300b: /* subv Rm,Rn */ -- 2.1.4