From: Bharata B Rao <bharata@linux.vnet.ibm.com>
To: qemu-devel@nongnu.org
Cc: thuth@redhat.com, aik@ozlabs.ru, mdroth@linux.vnet.ibm.com,
agraf@suse.de, qemu-ppc@nongnu.org, tyreld@linux.vnet.ibm.com,
Bharata B Rao <bharata@linux.vnet.ibm.com>,
nfont@linux.vnet.ibm.com, david@gibson.dropbear.id.au
Subject: [Qemu-devel] [PATCH v5 5/7] spapr: Consolidate cpu init code into a routine
Date: Tue, 16 Jun 2015 11:00:16 +0530 [thread overview]
Message-ID: <1434432618-19035-6-git-send-email-bharata@linux.vnet.ibm.com> (raw)
In-Reply-To: <1434432618-19035-1-git-send-email-bharata@linux.vnet.ibm.com>
Factor out bits of sPAPR specific CPU initialization code into
a separate routine so that it can be called from CPU hotplug
path too.
Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
---
hw/ppc/spapr.c | 54 +++++++++++++++++++++++++++++-------------------------
1 file changed, 29 insertions(+), 25 deletions(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index b368f9e..8f1fb2e 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -1408,6 +1408,34 @@ static void spapr_boot_set(void *opaque, const char *boot_device,
machine->boot_order = g_strdup(boot_device);
}
+static void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu)
+{
+ CPUPPCState *env = &cpu->env;
+
+ /* Set time-base frequency to 512 MHz */
+ cpu_ppc_tb_init(env, TIMEBASE_FREQ);
+
+ /* PAPR always has exception vectors in RAM not ROM. To ensure this,
+ * MSR[IP] should never be set.
+ */
+ env->msr_mask &= ~(1 << 6);
+
+ /* Tell KVM that we're in PAPR mode */
+ if (kvm_enabled()) {
+ kvmppc_set_papr(cpu);
+ }
+
+ if (cpu->max_compat) {
+ if (ppc_set_compat(cpu, cpu->max_compat) < 0) {
+ exit(1);
+ }
+ }
+
+ xics_cpu_setup(spapr->icp, cpu);
+
+ qemu_register_reset(spapr_cpu_reset, cpu);
+}
+
/* pSeries LPAR / sPAPR hardware init */
static void ppc_spapr_init(MachineState *machine)
{
@@ -1417,7 +1445,6 @@ static void ppc_spapr_init(MachineState *machine)
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
PowerPCCPU *cpu;
- CPUPPCState *env;
PCIHostState *phb;
int i;
MemoryRegion *sysmem = get_system_memory();
@@ -1502,30 +1529,7 @@ static void ppc_spapr_init(MachineState *machine)
fprintf(stderr, "Unable to find PowerPC CPU definition\n");
exit(1);
}
- env = &cpu->env;
-
- /* Set time-base frequency to 512 MHz */
- cpu_ppc_tb_init(env, TIMEBASE_FREQ);
-
- /* PAPR always has exception vectors in RAM not ROM. To ensure this,
- * MSR[IP] should never be set.
- */
- env->msr_mask &= ~(1 << 6);
-
- /* Tell KVM that we're in PAPR mode */
- if (kvm_enabled()) {
- kvmppc_set_papr(cpu);
- }
-
- if (cpu->max_compat) {
- if (ppc_set_compat(cpu, cpu->max_compat) < 0) {
- exit(1);
- }
- }
-
- xics_cpu_setup(spapr->icp, cpu);
-
- qemu_register_reset(spapr_cpu_reset, cpu);
+ spapr_cpu_init(spapr, cpu);
}
if (kvm_enabled()) {
--
2.1.0
next prev parent reply other threads:[~2015-06-16 5:31 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-16 5:30 [Qemu-devel] [PATCH v5 0/7] sPAPR CPU hotplug pre-requisites Bharata B Rao
2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 1/7] spapr: Consider max_cpus during xics initialization Bharata B Rao
2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 2/7] spapr: Support ibm, lrdr-capacity device tree property Bharata B Rao
2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 3/7] cpus: Add a macro to walk CPUs in reverse Bharata B Rao
2015-06-18 6:25 ` David Gibson
2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 4/7] spapr: Reorganize CPU dt generation code Bharata B Rao
2015-06-16 5:30 ` Bharata B Rao [this message]
2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 6/7] ppc: Update cpu_model in MachineState Bharata B Rao
2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 7/7] xics_kvm: Don't enable KVM_CAP_IRQ_XICS if already enabled Bharata B Rao
2015-06-18 6:24 ` [Qemu-devel] [PATCH v5 0/7] sPAPR CPU hotplug pre-requisites David Gibson
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