From: Alexander Graf <agraf@suse.de>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PULL 25/26] target-s390x: PER: add Breaking-Event-Address register
Date: Wed, 17 Jun 2015 12:43:08 +0200 [thread overview]
Message-ID: <1434537789-63782-26-git-send-email-agraf@suse.de> (raw)
In-Reply-To: <1434537789-63782-1-git-send-email-agraf@suse.de>
From: Aurelien Jarno <aurelien@aurel32.net>
This patch adds support for PER Breaking-Event-Address register. Like
real hardware, it save the current PSW address when the PSW address is
changed by an instruction. We have to take care of optimizations QEMU
does, a branch to the next instruction is still a branch.
This register is copied to low core memory when a program exception
happens.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Alexander Graf <agraf@suse.de>
---
target-s390x/cpu.c | 6 ++++++
target-s390x/cpu.h | 12 +++++++-----
target-s390x/helper.c | 1 +
target-s390x/translate.c | 29 +++++++++++++++++++++++------
4 files changed, 37 insertions(+), 11 deletions(-)
diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c
index 4daf643..69bac35 100644
--- a/target-s390x/cpu.c
+++ b/target-s390x/cpu.c
@@ -117,6 +117,9 @@ static void s390_cpu_initial_reset(CPUState *s)
env->cregs[0] = CR0_RESET;
env->cregs[14] = CR14_RESET;
+ /* architectured initial value for Breaking-Event-Address register */
+ env->gbea = 1;
+
env->pfault_token = -1UL;
env->ext_index = -1;
for (i = 0; i < ARRAY_SIZE(env->io_index); i++) {
@@ -152,6 +155,9 @@ static void s390_cpu_full_reset(CPUState *s)
env->cregs[0] = CR0_RESET;
env->cregs[14] = CR14_RESET;
+ /* architectured initial value for Breaking-Event-Address register */
+ env->gbea = 1;
+
env->pfault_token = -1UL;
env->ext_index = -1;
for (i = 0; i < ARRAY_SIZE(env->io_index); i++) {
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index 68321f5..7b87c7d 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -789,14 +789,16 @@ typedef struct LowCore
uint8_t pad5[0xf4-0xf0]; /* 0x0f0 */
uint32_t external_damage_code; /* 0x0f4 */
uint64_t failing_storage_address; /* 0x0f8 */
- uint8_t pad6[0x120-0x100]; /* 0x100 */
+ uint8_t pad6[0x110-0x100]; /* 0x100 */
+ uint64_t per_breaking_event_addr; /* 0x110 */
+ uint8_t pad7[0x120-0x118]; /* 0x118 */
PSW restart_old_psw; /* 0x120 */
PSW external_old_psw; /* 0x130 */
PSW svc_old_psw; /* 0x140 */
PSW program_old_psw; /* 0x150 */
PSW mcck_old_psw; /* 0x160 */
PSW io_old_psw; /* 0x170 */
- uint8_t pad7[0x1a0-0x180]; /* 0x180 */
+ uint8_t pad8[0x1a0-0x180]; /* 0x180 */
PSW restart_new_psw; /* 0x1a0 */
PSW external_new_psw; /* 0x1b0 */
PSW svc_new_psw; /* 0x1c0 */
@@ -814,10 +816,10 @@ typedef struct LowCore
uint64_t last_update_clock; /* 0x280 */
uint64_t steal_clock; /* 0x288 */
PSW return_mcck_psw; /* 0x290 */
- uint8_t pad8[0xc00-0x2a0]; /* 0x2a0 */
+ uint8_t pad9[0xc00-0x2a0]; /* 0x2a0 */
/* System info area */
uint64_t save_area[16]; /* 0xc00 */
- uint8_t pad9[0xd40-0xc80]; /* 0xc80 */
+ uint8_t pad10[0xd40-0xc80]; /* 0xc80 */
uint64_t kernel_stack; /* 0xd40 */
uint64_t thread_info; /* 0xd48 */
uint64_t async_stack; /* 0xd50 */
@@ -825,7 +827,7 @@ typedef struct LowCore
uint64_t user_asce; /* 0xd60 */
uint64_t panic_stack; /* 0xd68 */
uint64_t user_exec_asce; /* 0xd70 */
- uint8_t pad10[0xdc0-0xd78]; /* 0xd78 */
+ uint8_t pad11[0xdc0-0xd78]; /* 0xd78 */
/* SMP info area: defined by DJB */
uint64_t clock_comparator; /* 0xdc0 */
diff --git a/target-s390x/helper.c b/target-s390x/helper.c
index 615cccf..d887006 100644
--- a/target-s390x/helper.c
+++ b/target-s390x/helper.c
@@ -293,6 +293,7 @@ static void do_program_interrupt(CPUS390XState *env)
lowcore->program_old_psw.addr = cpu_to_be64(env->psw.addr);
mask = be64_to_cpu(lowcore->program_new_psw.mask);
addr = be64_to_cpu(lowcore->program_new_psw.addr);
+ lowcore->per_breaking_event_addr = cpu_to_be64(env->gbea);
cpu_unmap_lowcore(lowcore);
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index d69fb5c..42f52c7 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -150,6 +150,7 @@ void s390_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
static TCGv_i64 psw_addr;
static TCGv_i64 psw_mask;
+static TCGv_i64 gbea;
static TCGv_i32 cc_op;
static TCGv_i64 cc_src;
@@ -173,6 +174,9 @@ void s390x_translate_init(void)
psw_mask = tcg_global_mem_new_i64(TCG_AREG0,
offsetof(CPUS390XState, psw.mask),
"psw_mask");
+ gbea = tcg_global_mem_new_i64(TCG_AREG0,
+ offsetof(CPUS390XState, gbea),
+ "gbea");
cc_op = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUS390XState, cc_op),
"cc_op");
@@ -252,14 +256,14 @@ static void update_psw_addr(DisasContext *s)
static void per_branch(DisasContext *s, bool to_next)
{
#ifndef CONFIG_USER_ONLY
+ tcg_gen_movi_i64(gbea, s->pc);
+
if (s->tb->flags & FLAG_MASK_PER) {
- TCGv_i64 pc = tcg_const_i64(s->pc);
TCGv_i64 next_pc = to_next ? tcg_const_i64(s->next_pc) : psw_addr;
- gen_helper_per_branch(cpu_env, pc, next_pc);
+ gen_helper_per_branch(cpu_env, gbea, next_pc);
if (to_next) {
tcg_temp_free_i64(next_pc);
}
- tcg_temp_free_i64(pc);
}
#endif
}
@@ -272,15 +276,23 @@ static void per_branch_cond(DisasContext *s, TCGCond cond,
TCGLabel *lab = gen_new_label();
tcg_gen_brcond_i64(tcg_invert_cond(cond), arg1, arg2, lab);
- TCGv_i64 pc = tcg_const_i64(s->pc);
- gen_helper_per_branch(cpu_env, pc, psw_addr);
- tcg_temp_free_i64(pc);
+ tcg_gen_movi_i64(gbea, s->pc);
+ gen_helper_per_branch(cpu_env, gbea, psw_addr);
gen_set_label(lab);
+ } else {
+ TCGv_i64 pc = tcg_const_i64(s->pc);
+ tcg_gen_movcond_i64(cond, gbea, arg1, arg2, gbea, pc);
+ tcg_temp_free_i64(pc);
}
#endif
}
+static void per_breaking_event(DisasContext *s)
+{
+ tcg_gen_movi_i64(gbea, s->pc);
+}
+
static void update_cc_op(DisasContext *s)
{
if (s->cc_op != CC_OP_DYNAMIC && s->cc_op != CC_OP_STATIC) {
@@ -1220,6 +1232,7 @@ static ExitStatus help_goto_direct(DisasContext *s, uint64_t dest)
}
if (use_goto_tb(s, dest)) {
update_cc_op(s);
+ per_breaking_event(s);
tcg_gen_goto_tb(0);
tcg_gen_movi_i64(psw_addr, dest);
tcg_gen_exit_tb((uintptr_t)s->tb);
@@ -1287,6 +1300,7 @@ static ExitStatus help_branch(DisasContext *s, DisasCompare *c,
/* Branch taken. */
gen_set_label(lab);
+ per_breaking_event(s);
tcg_gen_goto_tb(1);
tcg_gen_movi_i64(psw_addr, dest);
tcg_gen_exit_tb((uintptr_t)s->tb + 1);
@@ -1318,6 +1332,7 @@ static ExitStatus help_branch(DisasContext *s, DisasCompare *c,
if (is_imm) {
tcg_gen_movi_i64(psw_addr, dest);
}
+ per_breaking_event(s);
ret = EXIT_PC_UPDATED;
}
} else {
@@ -2550,6 +2565,7 @@ static ExitStatus op_lpsw(DisasContext *s, DisasOps *o)
TCGv_i64 t1, t2;
check_privileged(s);
+ per_breaking_event(s);
t1 = tcg_temp_new_i64();
t2 = tcg_temp_new_i64();
@@ -2569,6 +2585,7 @@ static ExitStatus op_lpswe(DisasContext *s, DisasOps *o)
TCGv_i64 t1, t2;
check_privileged(s);
+ per_breaking_event(s);
t1 = tcg_temp_new_i64();
t2 = tcg_temp_new_i64();
--
1.7.12.4
next prev parent reply other threads:[~2015-06-17 10:43 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-17 10:42 [Qemu-devel] [PULL 00/26] s390 patch queue 2015-06-17 Alexander Graf
2015-06-17 10:42 ` [Qemu-devel] [PULL 01/26] s390/ioinst: fix IO_INT_WORD_ISC macro Alexander Graf
2015-06-17 10:42 ` [Qemu-devel] [PULL 02/26] s390/ioinst: fix endianness in ioinst_schib_valid Alexander Graf
2015-06-17 10:42 ` [Qemu-devel] [PULL 03/26] virtio-ccw: disable ioevent bit when ioeventfds are not enabled Alexander Graf
2015-06-17 10:42 ` [Qemu-devel] [PULL 04/26] target-s390x: fix setcc in TCG mode Alexander Graf
2015-06-17 10:42 ` [Qemu-devel] [PULL 05/26] target-s390x: correctly initialize ext interrupt queue Alexander Graf
2015-06-17 10:42 ` [Qemu-devel] [PULL 06/26] target-s390x: initialize I/O " Alexander Graf
2015-06-17 10:42 ` [Qemu-devel] [PULL 07/26] target-s390x: fix s390_cpu_initial_reset Alexander Graf
2015-06-17 10:42 ` [Qemu-devel] [PULL 08/26] target-s390x: wire up DIAG IPL in TCG mode Alexander Graf
2015-06-17 10:42 ` [Qemu-devel] [PULL 09/26] target-s390x: wire up DIAG REIPL " Alexander Graf
2015-06-17 10:42 ` [Qemu-devel] [PULL 10/26] target-s390x: wire up I/O instructions " Alexander Graf
2015-06-17 10:42 ` [Qemu-devel] [PULL 11/26] softmmu: provide tlb_vaddr_to_host function for user mode Alexander Graf
2015-06-17 10:42 ` [Qemu-devel] [PULL 12/26] target-s390x: function to adjust the length wrt page boundary Alexander Graf
2015-06-17 10:42 ` [Qemu-devel] [PULL 13/26] target-s390x: mvc_fast_memset: access memory through softmmu Alexander Graf
2015-06-17 10:42 ` [Qemu-devel] [PULL 14/26] target-s390x: mvc_fast_memmove: " Alexander Graf
2015-06-17 10:42 ` [Qemu-devel] [PULL 15/26] target-s390x: add PER related constants Alexander Graf
2015-06-17 10:42 ` [Qemu-devel] [PULL 16/26] target-s390x: add get_per_atmid function Alexander Graf
2015-06-17 10:43 ` [Qemu-devel] [PULL 17/26] target-s390x: add get_per_in_range function Alexander Graf
2015-06-17 10:43 ` [Qemu-devel] [PULL 18/26] target-s390x: basic PER event handling Alexander Graf
2015-06-17 10:43 ` [Qemu-devel] [PULL 19/26] target-s390x: PER successful-branching event support Alexander Graf
2015-06-17 10:43 ` [Qemu-devel] [PULL 20/26] target-s390x: PER instruction-fetch " Alexander Graf
2015-06-17 10:43 ` [Qemu-devel] [PULL 21/26] translate-all: fix watchpoints if retranslation not possible Alexander Graf
2015-06-17 10:43 ` [Qemu-devel] [PULL 22/26] target-s390x: PER storage-alteration event support Alexander Graf
2015-06-17 10:43 ` [Qemu-devel] [PULL 23/26] target-s390x: PER store-using-real-address " Alexander Graf
2015-06-17 10:43 ` [Qemu-devel] [PULL 24/26] target-s390x: PER instruction-fetch nullification " Alexander Graf
2015-06-17 10:43 ` Alexander Graf [this message]
2015-06-17 10:43 ` [Qemu-devel] [PULL 26/26] s390x: Switch to s390-ccw machine as default Alexander Graf
2015-06-17 12:11 ` [Qemu-devel] [PULL 00/26] s390 patch queue 2015-06-17 Christian Borntraeger
2015-06-17 13:03 ` Peter Maydell
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