From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: qemu-trivial@nongnu.org,
Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Subject: [Qemu-devel] [PATCH] target-tricore: fix depositing bits from PCXI into ICR
Date: Wed, 24 Jun 2015 14:01:10 +0200 [thread overview]
Message-ID: <1435147270-1040-1-git-send-email-pbonzini@redhat.com> (raw)
Spotted by Coverity, because (env->PCXI & MASK_PCXI_PCPN) >> 24
is always zero. The immediately preceding assignment is also
wrong though.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target-tricore/op_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-tricore/op_helper.c b/target-tricore/op_helper.c
index 10ed541..53edbda 100644
--- a/target-tricore/op_helper.c
+++ b/target-tricore/op_helper.c
@@ -2545,10 +2545,10 @@ void helper_rfm(CPUTriCoreState *env)
env->PC = (env->gpr_a[11] & ~0x1);
/* ICR.IE = PCXI.PIE; */
env->ICR = (env->ICR & ~MASK_ICR_IE) |
- ((env->PCXI & ~MASK_PCXI_PIE) >> 15);
+ ((env->PCXI & MASK_PCXI_PIE) >> 15);
/* ICR.CCPN = PCXI.PCPN; */
env->ICR = (env->ICR & ~MASK_ICR_CCPN) |
- ((env->PCXI & ~MASK_PCXI_PCPN) >> 24);
+ ((env->PCXI & MASK_PCXI_PCPN) >> 24);
/* {PCXI, PSW, A[10], A[11]} = M(DCX, 4 * word); */
env->PCXI = cpu_ldl_data(env, env->DCX);
psw_write(env, cpu_ldl_data(env, env->DCX+4));
--
2.4.3
next reply other threads:[~2015-06-24 12:01 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-24 12:01 Paolo Bonzini [this message]
2015-06-25 14:53 ` [Qemu-devel] [PATCH] target-tricore: fix depositing bits from PCXI into ICR Bastian Koppelmann
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