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From: Leon Alrae <leon.alrae@imgtec.com>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 03/20] target-mips: remove identical code in different branch
Date: Fri, 26 Jun 2015 11:25:07 +0100	[thread overview]
Message-ID: <1435314324-8755-4-git-send-email-leon.alrae@imgtec.com> (raw)
In-Reply-To: <1435314324-8755-1-git-send-email-leon.alrae@imgtec.com>

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
---
 target-mips/translate.c | 25 ++++---------------------
 1 file changed, 4 insertions(+), 21 deletions(-)

diff --git a/target-mips/translate.c b/target-mips/translate.c
index a2dbad5..7d9f2da 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -11852,11 +11852,7 @@ static int decode_mips16_opc (CPUMIPSState *env, DisasContext *ctx)
              *      when in debug mode...
              */
             check_insn(ctx, ISA_MIPS32);
-            if (!(ctx->hflags & MIPS_HFLAG_DM)) {
-                generate_exception(ctx, EXCP_DBp);
-            } else {
-                generate_exception(ctx, EXCP_DBp);
-            }
+            generate_exception(ctx, EXCP_DBp);
             break;
         case RR_SLT:
             gen_slt(ctx, OPC_SLT, 24, rx, ry);
@@ -12707,11 +12703,7 @@ static void gen_pool16c_insn(DisasContext *ctx)
          *      when in debug mode...
          */
         check_insn(ctx, ISA_MIPS32);
-        if (!(ctx->hflags & MIPS_HFLAG_DM)) {
-            generate_exception(ctx, EXCP_DBp);
-        } else {
-            generate_exception(ctx, EXCP_DBp);
-        }
+        generate_exception(ctx, EXCP_DBp);
         break;
     case JRADDIUSP + 0:
     case JRADDIUSP + 1:
@@ -13076,11 +13068,7 @@ static void gen_pool32axf (CPUMIPSState *env, DisasContext *ctx, int rt, int rs)
             break;
         case SDBBP:
             check_insn(ctx, ISA_MIPS32);
-            if (!(ctx->hflags & MIPS_HFLAG_DM)) {
-                generate_exception(ctx, EXCP_DBp);
-            } else {
-                generate_exception(ctx, EXCP_DBp);
-            }
+            generate_exception(ctx, EXCP_DBp);
             break;
         default:
             goto pool32axf_invalid;
@@ -16849,12 +16837,7 @@ static void decode_opc_special2_legacy(CPUMIPSState *env, DisasContext *ctx)
          *      when in debug mode...
          */
         check_insn(ctx, ISA_MIPS32);
-        if (!(ctx->hflags & MIPS_HFLAG_DM)) {
-            generate_exception(ctx, EXCP_DBp);
-        } else {
-            generate_exception(ctx, EXCP_DBp);
-        }
-        /* Treat as NOP. */
+        generate_exception(ctx, EXCP_DBp);
         break;
 #if defined(TARGET_MIPS64)
     case OPC_DCLO:
-- 
2.1.0

  parent reply	other threads:[~2015-06-26 10:25 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-26 10:25 [Qemu-devel] [PULL 00/20] target-mips queue Leon Alrae
2015-06-26 10:25 ` [Qemu-devel] [PULL 01/20] include/softmmu-semi.h: Make semihosting support 64-bit clean Leon Alrae
2015-06-26 10:25 ` [Qemu-devel] [PULL 02/20] hw/mips: Do not clear BEV for MIPS malta kernel load Leon Alrae
2015-06-26 10:25 ` Leon Alrae [this message]
2015-06-26 10:25 ` [Qemu-devel] [PULL 04/20] target-mips: add Unified Hosting Interface (UHI) support Leon Alrae
2015-06-26 10:25 ` [Qemu-devel] [PULL 05/20] target-mips: convert host to MIPS errno values when required Leon Alrae
2015-06-26 10:25 ` [Qemu-devel] [PULL 06/20] target-mips: fix {RD, WR}PGPR in microMIPS Leon Alrae
2015-06-26 10:25 ` [Qemu-devel] [PULL 07/20] target-mips: add microMIPS TLBINV, TLBINVF Leon Alrae
2015-06-26 10:25 ` [Qemu-devel] [PULL 08/20] target-mips: remove an unused argument Leon Alrae
2015-06-26 10:25 ` [Qemu-devel] [PULL 09/20] target-mips: refactor {D}LSA, {D}ALIGN, {D}BITSWAP Leon Alrae
2015-06-26 10:25 ` [Qemu-devel] [PULL 10/20] target-mips: rearrange gen_compute_compact_branch Leon Alrae
2015-06-26 10:25 ` [Qemu-devel] [PULL 11/20] target-mips: raise RI exceptions when FIR.PS = 0 Leon Alrae
2015-06-26 10:25 ` [Qemu-devel] [PULL 12/20] target-mips: signal RI for removed instructions in microMIPS R6 Leon Alrae
2015-06-26 10:25 ` [Qemu-devel] [PULL 13/20] target-mips: add microMIPS32 R6 opcode enum Leon Alrae
2015-06-26 10:25 ` [Qemu-devel] [PULL 14/20] target-mips: microMIPS32 R6 branches and jumps Leon Alrae
2015-06-26 10:25 ` [Qemu-devel] [PULL 15/20] target-mips: microMIPS32 R6 POOL32A{XF} instructions Leon Alrae
2015-06-26 10:25 ` [Qemu-devel] [PULL 16/20] target-mips: microMIPS32 R6 POOL32F instructions Leon Alrae
2015-06-26 10:25 ` [Qemu-devel] [PULL 17/20] target-mips: microMIPS32 R6 POOL32{I, C} instructions Leon Alrae
2015-06-26 10:25 ` [Qemu-devel] [PULL 18/20] target-mips: microMIPS32 R6 Major instructions Leon Alrae
2015-06-26 10:25 ` [Qemu-devel] [PULL 19/20] target-mips: microMIPS32 R6 POOL16{A, C} instructions Leon Alrae
2015-06-26 10:25 ` [Qemu-devel] [PULL 20/20] target-mips: add mips32r6-generic CPU definition Leon Alrae
2015-06-26 12:13 ` [Qemu-devel] [PULL 00/20] target-mips queue Peter Maydell

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