* [Qemu-devel] [PATCH] target-arm: fix write helper for TLBI ALLE1IS
@ 2015-06-30 15:02 Sergey Fedorov
2015-06-30 15:42 ` Peter Maydell
0 siblings, 1 reply; 3+ messages in thread
From: Sergey Fedorov @ 2015-06-30 15:02 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Sergey Fedorov
TLBI ALLE1IS is an operation that does invalidate TLB entries on all PEs
in the same Inner Sharable domain, not just on the current CPU. So we
must use tlbiall_is_write() here.
Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com>
---
target-arm/helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index aa34159..b87afe7 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2441,7 +2441,7 @@ static const ARMCPRegInfo v8_cp_reginfo[] = {
{ .name = "TLBI_ALLE1IS", .state = ARM_CP_STATE_AA64,
.opc0 = 1, .opc1 = 4, .crn = 8, .crm = 3, .opc2 = 4,
.access = PL2_W, .type = ARM_CP_NO_RAW,
- .writefn = tlbiall_write },
+ .writefn = tlbiall_is_write },
{ .name = "TLBI_VMALLE1IS", .state = ARM_CP_STATE_AA64,
.opc0 = 1, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 0,
.access = PL1_W, .type = ARM_CP_NO_RAW,
--
1.9.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [Qemu-devel] [PATCH] target-arm: fix write helper for TLBI ALLE1IS
2015-06-30 15:02 [Qemu-devel] [PATCH] target-arm: fix write helper for TLBI ALLE1IS Sergey Fedorov
@ 2015-06-30 15:42 ` Peter Maydell
2015-06-30 23:15 ` Edgar E. Iglesias
0 siblings, 1 reply; 3+ messages in thread
From: Peter Maydell @ 2015-06-30 15:42 UTC (permalink / raw)
To: Sergey Fedorov; +Cc: Edgar E. Iglesias, QEMU Developers
On 30 June 2015 at 16:02, Sergey Fedorov <serge.fdrv@gmail.com> wrote:
> TLBI ALLE1IS is an operation that does invalidate TLB entries on all PEs
> in the same Inner Sharable domain, not just on the current CPU. So we
> must use tlbiall_is_write() here.
>
> Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com>
> ---
> target-arm/helper.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index aa34159..b87afe7 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -2441,7 +2441,7 @@ static const ARMCPRegInfo v8_cp_reginfo[] = {
> { .name = "TLBI_ALLE1IS", .state = ARM_CP_STATE_AA64,
> .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 3, .opc2 = 4,
> .access = PL2_W, .type = ARM_CP_NO_RAW,
> - .writefn = tlbiall_write },
> + .writefn = tlbiall_is_write },
> { .name = "TLBI_VMALLE1IS", .state = ARM_CP_STATE_AA64,
> .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 0,
> .access = PL1_W, .type = ARM_CP_NO_RAW,
Nice catch -- applied to target-arm.next, thanks.
-- PMM
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [Qemu-devel] [PATCH] target-arm: fix write helper for TLBI ALLE1IS
2015-06-30 15:42 ` Peter Maydell
@ 2015-06-30 23:15 ` Edgar E. Iglesias
0 siblings, 0 replies; 3+ messages in thread
From: Edgar E. Iglesias @ 2015-06-30 23:15 UTC (permalink / raw)
To: Peter Maydell; +Cc: Sergey Fedorov, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 1265 bytes --]
Nice one, thanks!
---
Sent from my phone
On 01/07/2015 1:43 am, "Peter Maydell" <peter.maydell@linaro.org> wrote:
> On 30 June 2015 at 16:02, Sergey Fedorov <serge.fdrv@gmail.com> wrote:
> > TLBI ALLE1IS is an operation that does invalidate TLB entries on all PEs
> > in the same Inner Sharable domain, not just on the current CPU. So we
> > must use tlbiall_is_write() here.
> >
> > Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com>
> > ---
> > target-arm/helper.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/target-arm/helper.c b/target-arm/helper.c
> > index aa34159..b87afe7 100644
> > --- a/target-arm/helper.c
> > +++ b/target-arm/helper.c
> > @@ -2441,7 +2441,7 @@ static const ARMCPRegInfo v8_cp_reginfo[] = {
> > { .name = "TLBI_ALLE1IS", .state = ARM_CP_STATE_AA64,
> > .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 3, .opc2 = 4,
> > .access = PL2_W, .type = ARM_CP_NO_RAW,
> > - .writefn = tlbiall_write },
> > + .writefn = tlbiall_is_write },
> > { .name = "TLBI_VMALLE1IS", .state = ARM_CP_STATE_AA64,
> > .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 0,
> > .access = PL1_W, .type = ARM_CP_NO_RAW,
>
> Nice catch -- applied to target-arm.next, thanks.
>
> -- PMM
>
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2015-06-30 15:02 [Qemu-devel] [PATCH] target-arm: fix write helper for TLBI ALLE1IS Sergey Fedorov
2015-06-30 15:42 ` Peter Maydell
2015-06-30 23:15 ` Edgar E. Iglesias
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