From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37273) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZAnLe-00025b-9y for qemu-devel@nongnu.org; Thu, 02 Jul 2015 18:52:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZAnLc-0001hQ-F0 for qemu-devel@nongnu.org; Thu, 02 Jul 2015 18:52:50 -0400 Received: from mail-lb0-x232.google.com ([2a00:1450:4010:c04::232]:36553) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZAnLc-0001hJ-7c for qemu-devel@nongnu.org; Thu, 02 Jul 2015 18:52:48 -0400 Received: by lbbpo10 with SMTP id po10so40393199lbb.3 for ; Thu, 02 Jul 2015 15:52:47 -0700 (PDT) From: Dmitry Osipenko Date: Fri, 3 Jul 2015 01:52:11 +0300 Message-Id: <1435877531-24983-4-git-send-email-digetx@gmail.com> In-Reply-To: <1435877531-24983-1-git-send-email-digetx@gmail.com> References: <1435877531-24983-1-git-send-email-digetx@gmail.com> Subject: [Qemu-devel] [PATCH 3/3] arm_mptimer: Respect IT bit state List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Paolo Bonzini , Peter Crosthwaite , QEMU Developers Timer fires interrupt regardless of current IT(interrupt enable) bit state. Fix it by making timer to respect IT state. Signed-off-by: Dmitry Osipenko --- hw/timer/arm_mptimer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/timer/arm_mptimer.c b/hw/timer/arm_mptimer.c index 58e17c4..82c4462 100644 --- a/hw/timer/arm_mptimer.c +++ b/hw/timer/arm_mptimer.c @@ -38,7 +38,7 @@ static inline int get_current_cpu(ARMMPTimerState *s) static inline void timerblock_update_irq(TimerBlock *tb) { - qemu_set_irq(tb->irq, tb->status); + qemu_set_irq(tb->irq, tb->status && (tb->control & 4)); } /* Return conversion factor from mpcore timer ticks to qemu timer ticks. */ -- 2.4.4