From: John Snow <jsnow@redhat.com>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, jsnow@redhat.com
Subject: [Qemu-devel] [PULL 33/35] ahci: Do not map cmd_fis to generate response
Date: Sat, 4 Jul 2015 02:07:12 -0400 [thread overview]
Message-ID: <1435990034-8945-34-git-send-email-jsnow@redhat.com> (raw)
In-Reply-To: <1435990034-8945-1-git-send-email-jsnow@redhat.com>
The Register D2H FIS should copy the current values of
the registers instead of just parroting back the same
values the guest sent back to it.
In this case, the SECTOR COUNT variables are actually
not generally meaningful in terms of standard commands
(See ATA8-AC3 Section 9.2 Normal Outputs), so it actually
probably doesn't matter what we put in here.
Meanwhile, we do need to use the Register update FIS from
the NCQ pathways (in error cases), so getting rid of
references to cur_cmd here is a win for AHCI concurrency.
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id: 1435767578-32743-14-git-send-email-jsnow@redhat.com
---
hw/ide/ahci.c | 50 +++++---------------------------------------------
1 file changed, 5 insertions(+), 45 deletions(-)
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index a2620f6..eadd8b3 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -701,35 +701,13 @@ static void ahci_write_fis_sdb(AHCIState *s, int port, uint32_t finished)
static void ahci_write_fis_pio(AHCIDevice *ad, uint16_t len)
{
AHCIPortRegs *pr = &ad->port_regs;
- uint8_t *pio_fis, *cmd_fis;
- uint64_t tbl_addr;
- dma_addr_t cmd_len = 0x80;
+ uint8_t *pio_fis;
IDEState *s = &ad->port.ifs[0];
if (!ad->res_fis || !(pr->cmd & PORT_CMD_FIS_RX)) {
return;
}
- /* map cmd_fis */
- tbl_addr = le64_to_cpu(ad->cur_cmd->tbl_addr);
- cmd_fis = dma_memory_map(ad->hba->as, tbl_addr, &cmd_len,
- DMA_DIRECTION_TO_DEVICE);
-
- if (cmd_fis == NULL) {
- DPRINTF(ad->port_no, "dma_memory_map failed in ahci_write_fis_pio");
- ahci_trigger_irq(ad->hba, ad, PORT_IRQ_HBUS_ERR);
- return;
- }
-
- if (cmd_len != 0x80) {
- DPRINTF(ad->port_no,
- "dma_memory_map mapped too few bytes in ahci_write_fis_pio");
- dma_memory_unmap(ad->hba->as, cmd_fis, cmd_len,
- DMA_DIRECTION_TO_DEVICE, cmd_len);
- ahci_trigger_irq(ad->hba, ad, PORT_IRQ_HBUS_ERR);
- return;
- }
-
pio_fis = &ad->res_fis[RES_FIS_PSFIS];
pio_fis[0] = SATA_FIS_TYPE_PIO_SETUP;
@@ -745,8 +723,8 @@ static void ahci_write_fis_pio(AHCIDevice *ad, uint16_t len)
pio_fis[9] = s->hob_lcyl;
pio_fis[10] = s->hob_hcyl;
pio_fis[11] = 0;
- pio_fis[12] = cmd_fis[12];
- pio_fis[13] = cmd_fis[13];
+ pio_fis[12] = s->nsector & 0xFF;
+ pio_fis[13] = (s->nsector >> 8) & 0xFF;
pio_fis[14] = 0;
pio_fis[15] = s->status;
pio_fis[16] = len & 255;
@@ -763,9 +741,6 @@ static void ahci_write_fis_pio(AHCIDevice *ad, uint16_t len)
}
ahci_trigger_irq(ad->hba, ad, PORT_IRQ_PIOS_FIS);
-
- dma_memory_unmap(ad->hba->as, cmd_fis, cmd_len,
- DMA_DIRECTION_TO_DEVICE, cmd_len);
}
static void ahci_write_fis_d2h(AHCIDevice *ad, uint8_t *cmd_fis)
@@ -773,22 +748,12 @@ static void ahci_write_fis_d2h(AHCIDevice *ad, uint8_t *cmd_fis)
AHCIPortRegs *pr = &ad->port_regs;
uint8_t *d2h_fis;
int i;
- dma_addr_t cmd_len = 0x80;
- int cmd_mapped = 0;
IDEState *s = &ad->port.ifs[0];
if (!ad->res_fis || !(pr->cmd & PORT_CMD_FIS_RX)) {
return;
}
- if (!cmd_fis) {
- /* map cmd_fis */
- uint64_t tbl_addr = le64_to_cpu(ad->cur_cmd->tbl_addr);
- cmd_fis = dma_memory_map(ad->hba->as, tbl_addr, &cmd_len,
- DMA_DIRECTION_TO_DEVICE);
- cmd_mapped = 1;
- }
-
d2h_fis = &ad->res_fis[RES_FIS_RFIS];
d2h_fis[0] = SATA_FIS_TYPE_REGISTER_D2H;
@@ -804,8 +769,8 @@ static void ahci_write_fis_d2h(AHCIDevice *ad, uint8_t *cmd_fis)
d2h_fis[9] = s->hob_lcyl;
d2h_fis[10] = s->hob_hcyl;
d2h_fis[11] = 0;
- d2h_fis[12] = cmd_fis[12];
- d2h_fis[13] = cmd_fis[13];
+ d2h_fis[12] = s->nsector & 0xFF;
+ d2h_fis[13] = (s->nsector >> 8) & 0xFF;
for (i = 14; i < 20; i++) {
d2h_fis[i] = 0;
}
@@ -819,11 +784,6 @@ static void ahci_write_fis_d2h(AHCIDevice *ad, uint8_t *cmd_fis)
}
ahci_trigger_irq(ad->hba, ad, PORT_IRQ_D2H_REG_FIS);
-
- if (cmd_mapped) {
- dma_memory_unmap(ad->hba->as, cmd_fis, cmd_len,
- DMA_DIRECTION_TO_DEVICE, cmd_len);
- }
}
static int prdt_tbl_entry_size(const AHCI_SG *tbl)
--
2.1.0
next prev parent reply other threads:[~2015-07-04 6:07 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-04 6:06 [Qemu-devel] [PULL 00/35] Ide patches John Snow
2015-07-04 6:06 ` [Qemu-devel] [PULL 01/35] ahci: Do not ignore memory access read size John Snow
2015-07-04 6:06 ` [Qemu-devel] [PULL 02/35] qtest/ahci: add test_max John Snow
2015-07-04 6:06 ` [Qemu-devel] [PULL 03/35] libqos/ahci: fix memory management bugs John Snow
2015-07-04 6:06 ` [Qemu-devel] [PULL 04/35] qtest/ahci: add port_reset test John Snow
2015-07-04 6:06 ` [Qemu-devel] [PULL 05/35] ahci: Rename NCQFIS structure fields John Snow
2015-07-04 6:06 ` [Qemu-devel] [PULL 06/35] ahci: use shorter variables John Snow
2015-07-04 6:06 ` [Qemu-devel] [PULL 07/35] ahci: add ncq_err helper John Snow
2015-07-04 6:06 ` [Qemu-devel] [PULL 08/35] ahci: check for ncq prdtl overflow John Snow
2015-07-04 6:06 ` [Qemu-devel] [PULL 09/35] ahci: separate prdtl from opts John Snow
2015-07-04 6:06 ` [Qemu-devel] [PULL 10/35] ahci: add ncq debug checks John Snow
2015-07-04 6:06 ` [Qemu-devel] [PULL 11/35] ahci: ncq sector count correction John Snow
2015-07-04 6:06 ` [Qemu-devel] [PULL 12/35] ahci/qtest: Execute IDENTIFY prior to data commands John Snow
2015-07-04 6:06 ` [Qemu-devel] [PULL 13/35] libqos/ahci: fix cmd_sanity for ncq John Snow
2015-07-04 6:06 ` [Qemu-devel] [PULL 14/35] libqos/ahci: add NCQ frame support John Snow
2015-07-04 6:06 ` [Qemu-devel] [PULL 15/35] libqos/ahci: edit wait to be ncq aware John Snow
2015-07-04 6:06 ` [Qemu-devel] [PULL 16/35] libqos/ahci: adjust expected NCQ interrupts John Snow
2015-07-04 6:06 ` [Qemu-devel] [PULL 17/35] libqos/ahci: set the NCQ tag on command_commit John Snow
2015-07-04 6:06 ` [Qemu-devel] [PULL 18/35] libqos/ahci: Force all NCQ commands to be LBA48 John Snow
2015-07-04 6:06 ` [Qemu-devel] [PULL 19/35] qtest/ahci: simple ncq data test John Snow
2015-07-04 6:06 ` [Qemu-devel] [PULL 20/35] qtest/ahci: ncq migration test John Snow
2015-07-04 6:07 ` [Qemu-devel] [PULL 21/35] ide: add limit to .prepare_buf() John Snow
2015-07-04 6:07 ` [Qemu-devel] [PULL 22/35] ahci: stash ncq command John Snow
2015-07-04 6:07 ` [Qemu-devel] [PULL 23/35] ahci: assert is_ncq for process_ncq John Snow
2015-07-04 6:07 ` [Qemu-devel] [PULL 24/35] ahci: refactor process_ncq_command John Snow
2015-07-04 6:07 ` [Qemu-devel] [PULL 25/35] ahci: factor ncq_finish out of ncq_cb John Snow
2015-07-04 6:07 ` [Qemu-devel] [PULL 26/35] ahci: add rwerror=stop support for ncq John Snow
2015-07-04 6:07 ` [Qemu-devel] [PULL 27/35] ahci: correct types in NCQTransferState John Snow
2015-07-04 6:07 ` [Qemu-devel] [PULL 28/35] ahci: correct ncq sector count John Snow
2015-07-04 6:07 ` [Qemu-devel] [PULL 29/35] qtest/ahci: halted NCQ test John Snow
2015-07-04 6:07 ` [Qemu-devel] [PULL 30/35] ahci: add cmd header to ncq transfer state John Snow
2015-07-04 6:07 ` [Qemu-devel] [PULL 31/35] ahci: add get_cmd_header helper John Snow
2015-07-04 6:07 ` [Qemu-devel] [PULL 32/35] ahci: ncq migration John Snow
2015-07-09 14:11 ` Paolo Bonzini
2015-07-04 6:07 ` John Snow [this message]
2015-07-04 6:07 ` [Qemu-devel] [PULL 34/35] qtest/ahci: halted ncq migration test John Snow
2015-07-04 6:07 ` [Qemu-devel] [PULL 35/35] ahci: fix sdb fis semantics John Snow
2015-07-05 21:01 ` [Qemu-devel] [PULL 00/35] Ide patches Peter Maydell
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