* [Qemu-devel] [PULL v2 00/13] KVM patches (SMM implementation) for 2015-07-06
@ 2015-07-06 16:18 Paolo Bonzini
2015-07-06 16:18 ` [Qemu-devel] [PULL 03/13] target-i386: add support for SMBASE MSR and SMIs Paolo Bonzini
2015-07-06 16:31 ` [Qemu-devel] [PULL v2 00/13] KVM patches (SMM implementation) for 2015-07-06 Peter Maydell
0 siblings, 2 replies; 5+ messages in thread
From: Paolo Bonzini @ 2015-07-06 16:18 UTC (permalink / raw)
To: qemu-devel
The following changes since commit 7edd8e4660beb301d527257f8e04ebec0f841cb0:
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging (2015-07-06 14:03:44 +0100)
are available in the git repository at:
git://github.com/bonzini/qemu.git tags/for-upstream-smm
for you to fetch changes up to b90c5c82b7e723d7509b5dae8be9b74a4195a64a:
pc: add SMM property (2015-07-06 17:59:44 +0200)
----------------------------------------------------------------
This series implements KVM support for SMM, and lets you enable/disable
it through the "smm" property of x86 machine types.
Achievement unlocked: send two pull requests the same day with a conflict
between them.
----------------------------------------------------------------
Alexey Kardashevskiy (1):
linux-headers: Update to 4.2-rc1
Andrew Jones (1):
kvm-all: put kvm_mem_flags to more work
Paolo Bonzini (11):
piix4/ich9: do not raise SMI on ACPI enable/disable commands
target-i386: add support for SMBASE MSR and SMIs
kvm-all: remove useless typedef
kvm-all: move internal types to kvm_int.h
kvm-all: make KVM's memory listener more generic
kvm-all: add support for multiple address spaces
kvm-all: kvm_irqchip_create is not expected to fail
target-i386: register a separate KVM address space including SMRAM regions
pc_piix: rename kvm_enabled to smm_enabled
ich9: add smm_enabled field and arguments
pc: add SMM property
hw/acpi/ich9.c | 5 +-
hw/acpi/piix4.c | 13 +-
hw/i386/pc.c | 51 +++++
hw/i386/pc_piix.c | 7 +-
hw/i386/pc_q35.c | 6 +-
hw/isa/lpc_ich9.c | 9 +-
include/hw/acpi/ich9.h | 3 +-
include/hw/i386/ich9.h | 2 +-
include/hw/i386/pc.h | 5 +-
include/standard-headers/linux/input.h | 10 +-
include/standard-headers/linux/virtio_balloon.h | 1 +
include/standard-headers/linux/virtio_gpu.h | 2 +
include/sysemu/kvm_int.h | 39 ++++
kvm-all.c | 243 ++++++++++++------------
linux-headers/asm-x86/hyperv.h | 11 ++
linux-headers/linux/kvm.h | 2 +-
linux-headers/linux/vfio.h | 102 +++++++++-
linux-headers/linux/virtio_pci.h | 192 -------------------
target-i386/cpu.h | 1 +
target-i386/kvm.c | 146 ++++++++++++--
20 files changed, 506 insertions(+), 344 deletions(-)
create mode 100644 include/sysemu/kvm_int.h
delete mode 100644 linux-headers/linux/virtio_pci.h
--
1.8.3.1
^ permalink raw reply [flat|nested] 5+ messages in thread* [Qemu-devel] [PULL 03/13] target-i386: add support for SMBASE MSR and SMIs 2015-07-06 16:18 [Qemu-devel] [PULL v2 00/13] KVM patches (SMM implementation) for 2015-07-06 Paolo Bonzini @ 2015-07-06 16:18 ` Paolo Bonzini 2015-07-06 16:31 ` [Qemu-devel] [PULL v2 00/13] KVM patches (SMM implementation) for 2015-07-06 Peter Maydell 1 sibling, 0 replies; 5+ messages in thread From: Paolo Bonzini @ 2015-07-06 16:18 UTC (permalink / raw) To: qemu-devel Apart from the MSR, the smi field of struct kvm_vcpu_events has to be translated into the corresponding CPUX86State fields. Also, memory transaction flags depend on SMM state, so pull it from struct kvm_run on every exit from KVM to userspace. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> --- target-i386/cpu.h | 1 + target-i386/kvm.c | 105 +++++++++++++++++++++++++++++++++++++++++++++++------- 2 files changed, 94 insertions(+), 12 deletions(-) diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 603aaf0..ac39291 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -314,6 +314,7 @@ #define MSR_P6_PERFCTR0 0xc1 +#define MSR_IA32_SMBASE 0x9e #define MSR_MTRRcap 0xfe #define MSR_MTRRcap_VCNT 8 #define MSR_MTRRcap_FIXRANGE_SUPPORT (1 << 8) diff --git a/target-i386/kvm.c b/target-i386/kvm.c index 6426600..b42b56c 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -73,6 +73,7 @@ static bool has_msr_feature_control; static bool has_msr_async_pf_en; static bool has_msr_pv_eoi_en; static bool has_msr_misc_enable; +static bool has_msr_smbase; static bool has_msr_bndcfgs; static bool has_msr_kvm_steal_time; static int lm_capable_kernel; @@ -819,6 +820,10 @@ static int kvm_get_supported_msrs(KVMState *s) has_msr_tsc_deadline = true; continue; } + if (kvm_msr_list->indices[i] == MSR_IA32_SMBASE) { + has_msr_smbase = true; + continue; + } if (kvm_msr_list->indices[i] == MSR_IA32_MISC_ENABLE) { has_msr_misc_enable = true; continue; @@ -1245,6 +1250,9 @@ static int kvm_put_msrs(X86CPU *cpu, int level) kvm_msr_entry_set(&msrs[n++], MSR_IA32_MISC_ENABLE, env->msr_ia32_misc_enable); } + if (has_msr_smbase) { + kvm_msr_entry_set(&msrs[n++], MSR_IA32_SMBASE, env->smbase); + } if (has_msr_bndcfgs) { kvm_msr_entry_set(&msrs[n++], MSR_IA32_BNDCFGS, env->msr_bndcfgs); } @@ -1606,6 +1614,9 @@ static int kvm_get_msrs(X86CPU *cpu) if (has_msr_misc_enable) { msrs[n++].index = MSR_IA32_MISC_ENABLE; } + if (has_msr_smbase) { + msrs[n++].index = MSR_IA32_SMBASE; + } if (has_msr_feature_control) { msrs[n++].index = MSR_IA32_FEATURE_CONTROL; } @@ -1760,6 +1771,9 @@ static int kvm_get_msrs(X86CPU *cpu) case MSR_IA32_MISC_ENABLE: env->msr_ia32_misc_enable = msrs[i].data; break; + case MSR_IA32_SMBASE: + env->smbase = msrs[i].data; + break; case MSR_IA32_FEATURE_CONTROL: env->msr_ia32_feature_control = msrs[i].data; break; @@ -1923,6 +1937,7 @@ static int kvm_put_apic(X86CPU *cpu) static int kvm_put_vcpu_events(X86CPU *cpu, int level) { + CPUState *cs = CPU(cpu); CPUX86State *env = &cpu->env; struct kvm_vcpu_events events = {}; @@ -1947,6 +1962,24 @@ static int kvm_put_vcpu_events(X86CPU *cpu, int level) events.sipi_vector = env->sipi_vector; + if (has_msr_smbase) { + events.smi.smm = !!(env->hflags & HF_SMM_MASK); + events.smi.smm_inside_nmi = !!(env->hflags2 & HF2_SMM_INSIDE_NMI_MASK); + if (kvm_irqchip_in_kernel()) { + /* As soon as these are moved to the kernel, remove them + * from cs->interrupt_request. + */ + events.smi.pending = cs->interrupt_request & CPU_INTERRUPT_SMI; + events.smi.latched_init = cs->interrupt_request & CPU_INTERRUPT_INIT; + cs->interrupt_request &= ~(CPU_INTERRUPT_INIT | CPU_INTERRUPT_SMI); + } else { + /* Keep these in cs->interrupt_request. */ + events.smi.pending = 0; + events.smi.latched_init = 0; + } + events.flags |= KVM_VCPUEVENT_VALID_SMM; + } + events.flags = 0; if (level >= KVM_PUT_RESET_STATE) { events.flags |= @@ -1966,6 +1999,7 @@ static int kvm_get_vcpu_events(X86CPU *cpu) return 0; } + memset(&events, 0, sizeof(events)); ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_VCPU_EVENTS, &events); if (ret < 0) { return ret; @@ -1987,6 +2021,29 @@ static int kvm_get_vcpu_events(X86CPU *cpu) env->hflags2 &= ~HF2_NMI_MASK; } + if (events.flags & KVM_VCPUEVENT_VALID_SMM) { + if (events.smi.smm) { + env->hflags |= HF_SMM_MASK; + } else { + env->hflags &= ~HF_SMM_MASK; + } + if (events.smi.pending) { + cpu_interrupt(CPU(cpu), CPU_INTERRUPT_SMI); + } else { + cpu_reset_interrupt(CPU(cpu), CPU_INTERRUPT_SMI); + } + if (events.smi.smm_inside_nmi) { + env->hflags2 |= HF2_SMM_INSIDE_NMI_MASK; + } else { + env->hflags2 &= ~HF2_SMM_INSIDE_NMI_MASK; + } + if (events.smi.latched_init) { + cpu_interrupt(CPU(cpu), CPU_INTERRUPT_INIT); + } else { + cpu_reset_interrupt(CPU(cpu), CPU_INTERRUPT_INIT); + } + } + env->sipi_vector = events.sipi_vector; return 0; @@ -2190,16 +2247,28 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) int ret; /* Inject NMI */ - if (cpu->interrupt_request & CPU_INTERRUPT_NMI) { - qemu_mutex_lock_iothread(); - cpu->interrupt_request &= ~CPU_INTERRUPT_NMI; - qemu_mutex_unlock_iothread(); - - DPRINTF("injected NMI\n"); - ret = kvm_vcpu_ioctl(cpu, KVM_NMI); - if (ret < 0) { - fprintf(stderr, "KVM: injection failed, NMI lost (%s)\n", - strerror(-ret)); + if (cpu->interrupt_request & (CPU_INTERRUPT_NMI | CPU_INTERRUPT_SMI)) { + if (cpu->interrupt_request & CPU_INTERRUPT_NMI) { + qemu_mutex_lock_iothread(); + cpu->interrupt_request &= ~CPU_INTERRUPT_NMI; + qemu_mutex_unlock_iothread(); + DPRINTF("injected NMI\n"); + ret = kvm_vcpu_ioctl(cpu, KVM_NMI); + if (ret < 0) { + fprintf(stderr, "KVM: injection failed, NMI lost (%s)\n", + strerror(-ret)); + } + } + if (cpu->interrupt_request & CPU_INTERRUPT_SMI) { + qemu_mutex_lock_iothread(); + cpu->interrupt_request &= ~CPU_INTERRUPT_SMI; + qemu_mutex_unlock_iothread(); + DPRINTF("injected SMI\n"); + ret = kvm_vcpu_ioctl(cpu, KVM_SMI); + if (ret < 0) { + fprintf(stderr, "KVM: injection failed, SMI lost (%s)\n", + strerror(-ret)); + } } } @@ -2212,7 +2281,13 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) * pending TPR access reports. */ if (cpu->interrupt_request & (CPU_INTERRUPT_INIT | CPU_INTERRUPT_TPR)) { - cpu->exit_request = 1; + if ((cpu->interrupt_request & CPU_INTERRUPT_INIT) && + !(env->hflags & HF_SMM_MASK)) { + cpu->exit_request = 1; + } + if (cpu->interrupt_request & CPU_INTERRUPT_TPR) { + cpu->exit_request = 1; + } } if (!kvm_irqchip_in_kernel()) { @@ -2260,6 +2335,11 @@ MemTxAttrs kvm_arch_post_run(CPUState *cpu, struct kvm_run *run) X86CPU *x86_cpu = X86_CPU(cpu); CPUX86State *env = &x86_cpu->env; + if (run->flags & KVM_RUN_X86_SMM) { + env->hflags |= HF_SMM_MASK; + } else { + env->hflags &= HF_SMM_MASK; + } if (run->if_flag) { env->eflags |= IF_MASK; } else { @@ -2307,7 +2387,8 @@ int kvm_arch_process_async_events(CPUState *cs) } } - if (cs->interrupt_request & CPU_INTERRUPT_INIT) { + if ((cs->interrupt_request & CPU_INTERRUPT_INIT) && + !(env->hflags & HF_SMM_MASK)) { kvm_cpu_synchronize_state(cs); do_cpu_init(cpu); } -- 1.8.3.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [Qemu-devel] [PULL v2 00/13] KVM patches (SMM implementation) for 2015-07-06 2015-07-06 16:18 [Qemu-devel] [PULL v2 00/13] KVM patches (SMM implementation) for 2015-07-06 Paolo Bonzini 2015-07-06 16:18 ` [Qemu-devel] [PULL 03/13] target-i386: add support for SMBASE MSR and SMIs Paolo Bonzini @ 2015-07-06 16:31 ` Peter Maydell 2015-07-06 16:40 ` Paolo Bonzini 1 sibling, 1 reply; 5+ messages in thread From: Peter Maydell @ 2015-07-06 16:31 UTC (permalink / raw) To: Paolo Bonzini; +Cc: QEMU Developers On 6 July 2015 at 17:18, Paolo Bonzini <pbonzini@redhat.com> wrote: > The following changes since commit 7edd8e4660beb301d527257f8e04ebec0f841cb0: > > Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging (2015-07-06 14:03:44 +0100) > > are available in the git repository at: > > > git://github.com/bonzini/qemu.git tags/for-upstream-smm > > for you to fetch changes up to b90c5c82b7e723d7509b5dae8be9b74a4195a64a: > > pc: add SMM property (2015-07-06 17:59:44 +0200) > > ---------------------------------------------------------------- > This series implements KVM support for SMM, and lets you enable/disable > it through the "smm" property of x86 machine types. > > Achievement unlocked: send two pull requests the same day with a conflict > between them. :-) > ---------------------------------------------------------------- I'm afraid this doesn't build on OSX or on ARM Linux (or likely any build host where x86 isn't a CONFIG_KVM build): CC i386-softmmu/hw/i386/pc_piix.o /Users/pm215/src/qemu/hw/i386/pc.c:1782:56: error: use of undeclared identifier 'KVM_CAP_X86_SMM' smm_available = kvm_check_extension(kvm_state, KVM_CAP_X86_SMM); ^ 1 error generated. Putting #ifdef CONFIG_KVM around the offending line fixes this; there may be a cleaner approach. -- PMM ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Qemu-devel] [PULL v2 00/13] KVM patches (SMM implementation) for 2015-07-06 2015-07-06 16:31 ` [Qemu-devel] [PULL v2 00/13] KVM patches (SMM implementation) for 2015-07-06 Peter Maydell @ 2015-07-06 16:40 ` Paolo Bonzini 0 siblings, 0 replies; 5+ messages in thread From: Paolo Bonzini @ 2015-07-06 16:40 UTC (permalink / raw) To: Peter Maydell; +Cc: QEMU Developers On 06/07/2015 18:31, Peter Maydell wrote: > I'm afraid this doesn't build on OSX or on ARM Linux > (or likely any build host where x86 isn't a CONFIG_KVM build): > > CC i386-softmmu/hw/i386/pc_piix.o > /Users/pm215/src/qemu/hw/i386/pc.c:1782:56: error: use of undeclared identifier > 'KVM_CAP_X86_SMM' > smm_available = kvm_check_extension(kvm_state, KVM_CAP_X86_SMM); > ^ > 1 error generated. > > Putting #ifdef CONFIG_KVM around the offending line fixes this; > there may be a cleaner approach. Indeed the same file already does something cleaner for kvm_allows_irq0_override(). Paolo ^ permalink raw reply [flat|nested] 5+ messages in thread
* [Qemu-devel] [PULL 00/13] KVM patches (SMM implementation) for 2015-07-06
@ 2015-07-06 14:22 Paolo Bonzini
2015-07-06 14:22 ` [Qemu-devel] [PULL 03/13] target-i386: add support for SMBASE MSR and SMIs Paolo Bonzini
0 siblings, 1 reply; 5+ messages in thread
From: Paolo Bonzini @ 2015-07-06 14:22 UTC (permalink / raw)
To: qemu-devel
The following changes since commit 261ccf426a6df854ba398be92413476919dd67f9:
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150706' into staging (2015-07-06 11:04:54 +0100)
are available in the git repository at:
git://github.com/bonzini/qemu.git tags/for-upstream-smm
for you to fetch changes up to 1a685f55a5a23c7644c6f5ce51285cfbe3f7ca96:
pc: add SMM property (2015-07-06 14:47:07 +0200)
----------------------------------------------------------------
This series implements KVM support for SMM, and lets you enable/disable
it through the "smm" property of x86 machine types.
----------------------------------------------------------------
Same as previously posted.
Alexey Kardashevskiy (1):
linux-headers: Update to 4.2-rc1
Andrew Jones (1):
kvm-all: put kvm_mem_flags to more work
Paolo Bonzini (11):
piix4/ich9: do not raise SMI on ACPI enable/disable commands
target-i386: add support for SMBASE MSR and SMIs
kvm-all: remove useless typedef
kvm-all: move internal types to kvm_int.h
kvm-all: make KVM's memory listener more generic
kvm-all: add support for multiple address spaces
kvm-all: kvm_irqchip_create is not expected to fail
target-i386: register a separate KVM address space including SMRAM regions
pc_piix: rename kvm_enabled to smm_enabled
ich9: add smm_enabled field and arguments
pc: add SMM property
hw/acpi/ich9.c | 5 +-
hw/acpi/piix4.c | 13 +-
hw/i386/pc.c | 51 +++++
hw/i386/pc_piix.c | 7 +-
hw/i386/pc_q35.c | 6 +-
hw/isa/lpc_ich9.c | 9 +-
include/hw/acpi/ich9.h | 3 +-
include/hw/i386/ich9.h | 2 +-
include/hw/i386/pc.h | 5 +-
include/standard-headers/linux/input.h | 10 +-
include/standard-headers/linux/virtio_balloon.h | 1 +
include/standard-headers/linux/virtio_gpu.h | 2 +
include/sysemu/kvm_int.h | 39 ++++
kvm-all.c | 243 ++++++++++++------------
linux-headers/asm-x86/hyperv.h | 11 ++
linux-headers/linux/kvm.h | 2 +-
linux-headers/linux/vfio.h | 102 +++++++++-
linux-headers/linux/virtio_pci.h | 192 -------------------
target-i386/cpu.h | 1 +
target-i386/kvm.c | 139 +++++++++++++-
20 files changed, 502 insertions(+), 341 deletions(-)
create mode 100644 include/sysemu/kvm_int.h
delete mode 100644 linux-headers/linux/virtio_pci.h
--
1.8.3.1
^ permalink raw reply [flat|nested] 5+ messages in thread* [Qemu-devel] [PULL 03/13] target-i386: add support for SMBASE MSR and SMIs 2015-07-06 14:22 [Qemu-devel] [PULL " Paolo Bonzini @ 2015-07-06 14:22 ` Paolo Bonzini 0 siblings, 0 replies; 5+ messages in thread From: Paolo Bonzini @ 2015-07-06 14:22 UTC (permalink / raw) To: qemu-devel Apart from the MSR, the smi field of struct kvm_vcpu_events has to be translated into the corresponding CPUX86State fields. Also, memory transaction flags depend on SMM state, so pull it from struct kvm_run on every exit from KVM to userspace. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> --- target-i386/cpu.h | 1 + target-i386/kvm.c | 98 ++++++++++++++++++++++++++++++++++++++++++++++++++----- 2 files changed, 90 insertions(+), 9 deletions(-) diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 603aaf0..ac39291 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -314,6 +314,7 @@ #define MSR_P6_PERFCTR0 0xc1 +#define MSR_IA32_SMBASE 0x9e #define MSR_MTRRcap 0xfe #define MSR_MTRRcap_VCNT 8 #define MSR_MTRRcap_FIXRANGE_SUPPORT (1 << 8) diff --git a/target-i386/kvm.c b/target-i386/kvm.c index daced5c..bc781c8 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -73,6 +73,7 @@ static bool has_msr_feature_control; static bool has_msr_async_pf_en; static bool has_msr_pv_eoi_en; static bool has_msr_misc_enable; +static bool has_msr_smbase; static bool has_msr_bndcfgs; static bool has_msr_kvm_steal_time; static int lm_capable_kernel; @@ -819,6 +820,10 @@ static int kvm_get_supported_msrs(KVMState *s) has_msr_tsc_deadline = true; continue; } + if (kvm_msr_list->indices[i] == MSR_IA32_SMBASE) { + has_msr_smbase = true; + continue; + } if (kvm_msr_list->indices[i] == MSR_IA32_MISC_ENABLE) { has_msr_misc_enable = true; continue; @@ -1245,6 +1250,9 @@ static int kvm_put_msrs(X86CPU *cpu, int level) kvm_msr_entry_set(&msrs[n++], MSR_IA32_MISC_ENABLE, env->msr_ia32_misc_enable); } + if (has_msr_smbase) { + kvm_msr_entry_set(&msrs[n++], MSR_IA32_SMBASE, env->smbase); + } if (has_msr_bndcfgs) { kvm_msr_entry_set(&msrs[n++], MSR_IA32_BNDCFGS, env->msr_bndcfgs); } @@ -1606,6 +1614,9 @@ static int kvm_get_msrs(X86CPU *cpu) if (has_msr_misc_enable) { msrs[n++].index = MSR_IA32_MISC_ENABLE; } + if (has_msr_smbase) { + msrs[n++].index = MSR_IA32_SMBASE; + } if (has_msr_feature_control) { msrs[n++].index = MSR_IA32_FEATURE_CONTROL; } @@ -1760,6 +1771,9 @@ static int kvm_get_msrs(X86CPU *cpu) case MSR_IA32_MISC_ENABLE: env->msr_ia32_misc_enable = msrs[i].data; break; + case MSR_IA32_SMBASE: + env->smbase = msrs[i].data; + break; case MSR_IA32_FEATURE_CONTROL: env->msr_ia32_feature_control = msrs[i].data; break; @@ -1923,6 +1937,7 @@ static int kvm_put_apic(X86CPU *cpu) static int kvm_put_vcpu_events(X86CPU *cpu, int level) { + CPUState *cs = CPU(cpu); CPUX86State *env = &cpu->env; struct kvm_vcpu_events events = {}; @@ -1947,6 +1962,24 @@ static int kvm_put_vcpu_events(X86CPU *cpu, int level) events.sipi_vector = env->sipi_vector; + if (has_msr_smbase) { + events.smi.smm = !!(env->hflags & HF_SMM_MASK); + events.smi.smm_inside_nmi = !!(env->hflags2 & HF2_SMM_INSIDE_NMI_MASK); + if (kvm_irqchip_in_kernel()) { + /* As soon as these are moved to the kernel, remove them + * from cs->interrupt_request. + */ + events.smi.pending = cs->interrupt_request & CPU_INTERRUPT_SMI; + events.smi.latched_init = cs->interrupt_request & CPU_INTERRUPT_INIT; + cs->interrupt_request &= ~(CPU_INTERRUPT_INIT | CPU_INTERRUPT_SMI); + } else { + /* Keep these in cs->interrupt_request. */ + events.smi.pending = 0; + events.smi.latched_init = 0; + } + events.flags |= KVM_VCPUEVENT_VALID_SMM; + } + events.flags = 0; if (level >= KVM_PUT_RESET_STATE) { events.flags |= @@ -1966,6 +1999,7 @@ static int kvm_get_vcpu_events(X86CPU *cpu) return 0; } + memset(&events, 0, sizeof(events)); ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_VCPU_EVENTS, &events); if (ret < 0) { return ret; @@ -1987,6 +2021,29 @@ static int kvm_get_vcpu_events(X86CPU *cpu) env->hflags2 &= ~HF2_NMI_MASK; } + if (events.flags & KVM_VCPUEVENT_VALID_SMM) { + if (events.smi.smm) { + env->hflags |= HF_SMM_MASK; + } else { + env->hflags &= ~HF_SMM_MASK; + } + if (events.smi.pending) { + cpu_interrupt(CPU(cpu), CPU_INTERRUPT_SMI); + } else { + cpu_reset_interrupt(CPU(cpu), CPU_INTERRUPT_SMI); + } + if (events.smi.smm_inside_nmi) { + env->hflags2 |= HF2_SMM_INSIDE_NMI_MASK; + } else { + env->hflags2 &= ~HF2_SMM_INSIDE_NMI_MASK; + } + if (events.smi.latched_init) { + cpu_interrupt(CPU(cpu), CPU_INTERRUPT_INIT); + } else { + cpu_reset_interrupt(CPU(cpu), CPU_INTERRUPT_INIT); + } + } + env->sipi_vector = events.sipi_vector; return 0; @@ -2190,13 +2247,24 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) int ret; /* Inject NMI */ - if (cpu->interrupt_request & CPU_INTERRUPT_NMI) { - cpu->interrupt_request &= ~CPU_INTERRUPT_NMI; - DPRINTF("injected NMI\n"); - ret = kvm_vcpu_ioctl(cpu, KVM_NMI); - if (ret < 0) { - fprintf(stderr, "KVM: injection failed, NMI lost (%s)\n", - strerror(-ret)); + if (cpu->interrupt_request & (CPU_INTERRUPT_NMI | CPU_INTERRUPT_SMI)) { + if (cpu->interrupt_request & CPU_INTERRUPT_NMI) { + cpu->interrupt_request &= ~CPU_INTERRUPT_NMI; + DPRINTF("injected NMI\n"); + ret = kvm_vcpu_ioctl(cpu, KVM_NMI); + if (ret < 0) { + fprintf(stderr, "KVM: injection failed, NMI lost (%s)\n", + strerror(-ret)); + } + } + if (cpu->interrupt_request & CPU_INTERRUPT_SMI) { + cpu->interrupt_request &= ~CPU_INTERRUPT_SMI; + DPRINTF("injected SMI\n"); + ret = kvm_vcpu_ioctl(cpu, KVM_SMI); + if (ret < 0) { + fprintf(stderr, "KVM: injection failed, SMI lost (%s)\n", + strerror(-ret)); + } } } @@ -2205,7 +2273,13 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) * pending TPR access reports. */ if (cpu->interrupt_request & (CPU_INTERRUPT_INIT | CPU_INTERRUPT_TPR)) { - cpu->exit_request = 1; + if ((cpu->interrupt_request & CPU_INTERRUPT_INIT) && + !(env->hflags & HF_SMM_MASK)) { + cpu->exit_request = 1; + } + if (cpu->interrupt_request & CPU_INTERRUPT_TPR) { + cpu->exit_request = 1; + } } if (!kvm_irqchip_in_kernel()) { @@ -2251,6 +2325,11 @@ MemTxAttrs kvm_arch_post_run(CPUState *cpu, struct kvm_run *run) X86CPU *x86_cpu = X86_CPU(cpu); CPUX86State *env = &x86_cpu->env; + if (run->flags & KVM_RUN_X86_SMM) { + env->hflags |= HF_SMM_MASK; + } else { + env->hflags &= HF_SMM_MASK; + } if (run->if_flag) { env->eflags |= IF_MASK; } else { @@ -2289,7 +2368,8 @@ int kvm_arch_process_async_events(CPUState *cs) } } - if (cs->interrupt_request & CPU_INTERRUPT_INIT) { + if ((cs->interrupt_request & CPU_INTERRUPT_INIT) && + !(env->hflags & HF_SMM_MASK)) { kvm_cpu_synchronize_state(cs); do_cpu_init(cpu); } -- 1.8.3.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
end of thread, other threads:[~2015-07-06 16:40 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2015-07-06 16:18 [Qemu-devel] [PULL v2 00/13] KVM patches (SMM implementation) for 2015-07-06 Paolo Bonzini 2015-07-06 16:18 ` [Qemu-devel] [PULL 03/13] target-i386: add support for SMBASE MSR and SMIs Paolo Bonzini 2015-07-06 16:31 ` [Qemu-devel] [PULL v2 00/13] KVM patches (SMM implementation) for 2015-07-06 Peter Maydell 2015-07-06 16:40 ` Paolo Bonzini -- strict thread matches above, loose matches on Subject: below -- 2015-07-06 14:22 [Qemu-devel] [PULL " Paolo Bonzini 2015-07-06 14:22 ` [Qemu-devel] [PULL 03/13] target-i386: add support for SMBASE MSR and SMIs Paolo Bonzini
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