From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50540) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZCFal-0005Lg-Rk for qemu-devel@nongnu.org; Mon, 06 Jul 2015 19:14:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZCFak-0007sC-BR for qemu-devel@nongnu.org; Mon, 06 Jul 2015 19:14:27 -0400 Received: from cantor2.suse.de ([195.135.220.15]:44135 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZCFak-0007r7-1I for qemu-devel@nongnu.org; Mon, 06 Jul 2015 19:14:26 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Tue, 7 Jul 2015 01:14:00 +0200 Message-Id: <1436224445-19449-18-git-send-email-afaerber@suse.de> In-Reply-To: <1436224445-19449-1-git-send-email-afaerber@suse.de> References: <1436224445-19449-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL 17/22] disas: QOMify target specific setup List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Crosthwaite , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Peter Crosthwaite From: Peter Crosthwaite Add a QOM function hook for target-specific disassembly setup. This allows removal of the #ifdeffery currently implementing target specific disas setup from disas.c. Reviewed-by: Richard Henderson Signed-off-by: Peter Crosthwaite Signed-off-by: Andreas F=C3=A4rber --- disas.c | 22 ++++++++++++++++++---- include/qom/cpu.h | 4 ++++ 2 files changed, 22 insertions(+), 4 deletions(-) diff --git a/disas.c b/disas.c index 363c3bf..ff5425d 100644 --- a/disas.c +++ b/disas.c @@ -1,5 +1,6 @@ /* General "disassemble this chunk" code. Used for debugging. */ #include "config.h" +#include "qemu-common.h" #include "disas/bfd.h" #include "elf.h" #include @@ -198,6 +199,7 @@ static int print_insn_od_target(bfd_vma pc, disassemb= le_info *info) void target_disas(FILE *out, CPUState *cpu, target_ulong code, target_ulong size, int flags) { + CPUClass *cc =3D CPU_GET_CLASS(cpu); target_ulong pc; int count; CPUDebug s; @@ -215,6 +217,11 @@ void target_disas(FILE *out, CPUState *cpu, target_u= long code, #else s.info.endian =3D BFD_ENDIAN_LITTLE; #endif + + if (cc->disas_set_info) { + cc->disas_set_info(cpu, &s.info); + } + #if defined(TARGET_I386) if (flags =3D=3D 2) { s.info.mach =3D bfd_mach_x86_64; @@ -449,6 +456,7 @@ monitor_fprintf(FILE *stream, const char *fmt, ...) void monitor_disas(Monitor *mon, CPUState *cpu, target_ulong pc, int nb_insn, int is_physical, int fl= ags) { + CPUClass *cc =3D CPU_GET_CLASS(cpu); int count, i; CPUDebug s; =20 @@ -466,6 +474,11 @@ void monitor_disas(Monitor *mon, CPUState *cpu, #else s.info.endian =3D BFD_ENDIAN_LITTLE; #endif + + if (cc->disas_set_info) { + cc->disas_set_info(cpu, &s.info); + } + #if defined(TARGET_I386) if (flags =3D=3D 2) { s.info.mach =3D bfd_mach_x86_64; @@ -519,11 +532,12 @@ void monitor_disas(Monitor *mon, CPUState *cpu, #elif defined(TARGET_LM32) s.info.mach =3D bfd_mach_lm32; s.info.print_insn =3D print_insn_lm32; -#else - monitor_printf(mon, "0x" TARGET_FMT_lx - ": Asm output not supported on this arch\n", pc); - return; #endif + if (!s.info.print_insn) { + monitor_printf(mon, "0x" TARGET_FMT_lx + ": Asm output not supported on this arch\n", pc); + return; + } =20 for(i =3D 0; i < nb_insn; i++) { monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc); diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 5db1ea3..8016724 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -23,6 +23,7 @@ #include #include #include "hw/qdev-core.h" +#include "disas/bfd.h" #include "exec/hwaddr.h" #include "exec/memattrs.h" #include "qemu/queue.h" @@ -117,6 +118,7 @@ struct TranslationBlock; * @cpu_exec_enter: Callback for cpu_exec preparation. * @cpu_exec_exit: Callback for cpu_exec cleanup. * @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec. + * @disas_set_info: Setup architecture specific components of disassembl= y info * * Represents a CPU family or model. */ @@ -172,6 +174,8 @@ typedef struct CPUClass { void (*cpu_exec_enter)(CPUState *cpu); void (*cpu_exec_exit)(CPUState *cpu); bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request); + + void (*disas_set_info)(CPUState *cpu, disassemble_info *info); } CPUClass; =20 #ifdef HOST_WORDS_BIGENDIAN --=20 2.1.4