From: Tiejun Chen <tiejun.chen@intel.com>
To: stefano.stabellini@eu.citrix.com, mst@redhat.com,
pbonzini@redhat.com, ehabkost@redhat.com, rth@twiddle.net
Cc: qemu-devel@nongnu.org
Subject: [Qemu-devel] [v9][PATCH 03/10] piix: create host bridge to passthrough
Date: Tue, 7 Jul 2015 13:33:04 +0800 [thread overview]
Message-ID: <1436247191-13577-4-git-send-email-tiejun.chen@intel.com> (raw)
In-Reply-To: <1436247191-13577-1-git-send-email-tiejun.chen@intel.com>
Implement a pci host bridge specific to passthrough. Actually
this just inherits the standard one. And we also just expose
a minimal real host bridge pci configuration subset.
Signed-off-by: Tiejun Chen <tiejun.chen@intel.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
---
v9:
* Just rebase on the latest.
hw/pci-host/piix.c | 82 ++++++++++++++++++++++++++++++++++++++++++++++++++++
include/hw/i386/pc.h | 2 ++
2 files changed, 84 insertions(+)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index a203d93..7adf645 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -734,6 +734,87 @@ static const TypeInfo i440fx_info = {
.class_init = i440fx_class_init,
};
+/* IGD Passthrough Host Bridge. */
+typedef struct {
+ uint8_t offset;
+ uint8_t len;
+} IGDHostInfo;
+
+/* Here we just expose minimal host bridge offset subset. */
+static const IGDHostInfo igd_host_bridge_infos[] = {
+ {0x08, 2}, /* revision id */
+ {0x2c, 2}, /* sybsystem vendor id */
+ {0x2e, 2}, /* sybsystem id */
+ {0x50, 2}, /* SNB: processor graphics control register */
+ {0x52, 2}, /* processor graphics control register */
+ {0xa4, 4}, /* SNB: graphics base of stolen memory */
+ {0xa8, 4}, /* SNB: base of GTT stolen memory */
+};
+
+static int host_pci_config_read(int pos, int len, uint32_t val)
+{
+ char path[PATH_MAX];
+ int config_fd;
+ ssize_t size = sizeof(path);
+ /* Access real host bridge. */
+ int rc = snprintf(path, size, "/sys/bus/pci/devices/%04x:%02x:%02x.%d/%s",
+ 0, 0, 0, 0, "config");
+
+ if (rc >= size || rc < 0) {
+ return -ENODEV;
+ }
+
+ config_fd = open(path, O_RDWR);
+ if (config_fd < 0) {
+ return -ENODEV;
+ }
+
+ do {
+ rc = pread(config_fd, (uint8_t *)&val, len, pos);
+ } while (rc < 0 && (errno == EINTR || errno == EAGAIN));
+ if (rc != len) {
+ return -errno;
+ }
+
+ return 0;
+}
+
+static int igd_pt_i440fx_initfn(struct PCIDevice *pci_dev)
+{
+ uint32_t val = 0;
+ int rc, i, num;
+ int pos, len;
+
+ num = ARRAY_SIZE(igd_host_bridge_infos);
+ for (i = 0; i < num; i++) {
+ pos = igd_host_bridge_infos[i].offset;
+ len = igd_host_bridge_infos[i].len;
+ rc = host_pci_config_read(pos, len, val);
+ if (rc) {
+ return -ENODEV;
+ }
+ pci_default_write_config(pci_dev, pos, val, len);
+ }
+
+ return 0;
+}
+
+static void igd_passthrough_i440fx_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = igd_pt_i440fx_initfn;
+ dc->desc = "IGD Passthrough Host bridge";
+}
+
+static const TypeInfo igd_passthrough_i440fx_info = {
+ .name = TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE,
+ .parent = TYPE_I440FX_PCI_DEVICE,
+ .instance_size = sizeof(PCII440FXState),
+ .class_init = igd_passthrough_i440fx_class_init,
+};
+
static const char *i440fx_pcihost_root_bus_path(PCIHostState *host_bridge,
PCIBus *rootbus)
{
@@ -775,6 +856,7 @@ static const TypeInfo i440fx_pcihost_info = {
static void i440fx_register_types(void)
{
type_register_static(&i440fx_info);
+ type_register_static(&igd_passthrough_i440fx_info);
type_register_static(&piix3_pci_type_info);
type_register_static(&piix3_info);
type_register_static(&piix3_xen_info);
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 566659a..b2d3cf3 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -227,6 +227,8 @@ typedef struct PCII440FXState PCII440FXState;
#define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost"
#define TYPE_I440FX_PCI_DEVICE "i440FX"
+#define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX"
+
PCIBus *i440fx_init(const char *host_type, const char *pci_type,
PCII440FXState **pi440fx_state, int *piix_devfn,
ISABus **isa_bus, qemu_irq *pic,
--
1.9.1
next prev parent reply other threads:[~2015-07-07 5:38 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-07 5:33 [Qemu-devel] [v9][PATCH 00/10] xen: add Intel IGD passthrough Tiejun Chen
2015-07-07 5:33 ` [Qemu-devel] [v9][PATCH 01/10] i440fx: make types configurable at run-time Tiejun Chen
2015-07-07 5:33 ` [Qemu-devel] [v9][PATCH 02/10] pc_init1: pass parameters just with types Tiejun Chen
2015-07-07 5:33 ` Tiejun Chen [this message]
2015-07-07 5:33 ` [Qemu-devel] [v9][PATCH 04/10] hw/pci-assign: split pci-assign.c Tiejun Chen
2015-07-07 5:33 ` [Qemu-devel] [v9][PATCH 05/10] xen, gfx passthrough: basic graphics passthrough support Tiejun Chen
2015-07-07 5:33 ` [Qemu-devel] [v9][PATCH 06/10] xen, gfx passthrough: retrieve VGA BIOS to work Tiejun Chen
2015-07-07 5:33 ` [Qemu-devel] [v9][PATCH 07/10] igd gfx passthrough: create a isa bridge Tiejun Chen
2015-07-07 5:33 ` [Qemu-devel] [v9][PATCH 08/10] xen, gfx passthrough: register " Tiejun Chen
2015-07-13 16:14 ` Stefano Stabellini
2015-07-13 17:01 ` Michael S. Tsirkin
2015-07-14 8:42 ` Chen, Tiejun
2015-07-14 8:49 ` Michael S. Tsirkin
2015-07-07 5:33 ` [Qemu-devel] [v9][PATCH 09/10] xen, gfx passthrough: register host bridge specific to passthrough Tiejun Chen
2015-07-13 16:16 ` Stefano Stabellini
2015-07-07 5:33 ` [Qemu-devel] [v9][PATCH 10/10] xen, gfx passthrough: add opregion mapping Tiejun Chen
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