From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53439) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZEdDA-0007Xz-3j for qemu-devel@nongnu.org; Mon, 13 Jul 2015 08:51:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZEdD4-0003BX-Ga for qemu-devel@nongnu.org; Mon, 13 Jul 2015 08:51:56 -0400 Received: from mail-pa0-x22d.google.com ([2607:f8b0:400e:c03::22d]:34530) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZEdD4-0003BQ-9F for qemu-devel@nongnu.org; Mon, 13 Jul 2015 08:51:50 -0400 Received: by pacan13 with SMTP id an13so15631742pac.1 for ; Mon, 13 Jul 2015 05:51:49 -0700 (PDT) From: "Edgar E. Iglesias" Date: Mon, 13 Jul 2015 22:51:03 +1000 Message-Id: <1436791864-4582-7-git-send-email-edgar.iglesias@gmail.com> In-Reply-To: <1436791864-4582-1-git-send-email-edgar.iglesias@gmail.com> References: <1436791864-4582-1-git-send-email-edgar.iglesias@gmail.com> Subject: [Qemu-devel] [PATCH v6 6/7] hw/arm/virt: Replace magic IRQ constants with macros List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: edgar.iglesias@xilinx.com, serge.fdrv@gmail.com, alex.bennee@linaro.org, agraf@suse.de From: "Edgar E. Iglesias" Replace magic constants with macros from hw/arm/virt.h and hw/intc/arm_gic_common.h. Reviewed-by: Peter Maydell Signed-off-by: Edgar E. Iglesias --- hw/arm/virt.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 4846892..42efad1 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -48,6 +48,7 @@ #include "hw/arm/sysbus-fdt.h" #include "hw/platform-bus.h" #include "hw/arm/fdt.h" +#include "hw/intc/arm_gic_common.h" /* Number of external interrupt lines to configure the GIC with */ #define NUM_IRQS 256 @@ -390,15 +391,17 @@ static void create_gic(VirtBoardInfo *vbi, qemu_irq *pic) */ for (i = 0; i < smp_cpus; i++) { DeviceState *cpudev = DEVICE(qemu_get_cpu(i)); - int ppibase = NUM_IRQS + i * 32; + int ppibase = NUM_IRQS + i * GIC_INTERNAL + GIC_NR_SGIS; /* physical timer; we wire it up to the non-secure timer's ID, * since a real A15 always has TrustZone but QEMU doesn't. */ qdev_connect_gpio_out(cpudev, 0, - qdev_get_gpio_in(gicdev, ppibase + 30)); + qdev_get_gpio_in(gicdev, + ppibase + ARCH_TIMER_NS_EL1_IRQ)); /* virtual timer */ qdev_connect_gpio_out(cpudev, 1, - qdev_get_gpio_in(gicdev, ppibase + 27)); + qdev_get_gpio_in(gicdev, + ppibase + ARCH_TIMER_VIRT_IRQ)); sysbus_connect_irq(gicbusdev, i, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ)); sysbus_connect_irq(gicbusdev, i + smp_cpus, -- 1.9.1