From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57919) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZFKTN-0000WS-PG for qemu-devel@nongnu.org; Wed, 15 Jul 2015 07:03:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZFKTH-0001Jt-NT for qemu-devel@nongnu.org; Wed, 15 Jul 2015 07:03:33 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:100::1]:47949) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZFKTH-0001JC-Gl for qemu-devel@nongnu.org; Wed, 15 Jul 2015 07:03:27 -0400 From: Aurelien Jarno Date: Wed, 15 Jul 2015 13:03:17 +0200 Message-Id: <1436958199-5181-8-git-send-email-aurelien@aurel32.net> In-Reply-To: <1436958199-5181-1-git-send-email-aurelien@aurel32.net> References: <1436958199-5181-1-git-send-email-aurelien@aurel32.net> Subject: [Qemu-devel] [PATCH RFC 7/9] tcg: replace ext/u_i32_i64 by a mov when not implemented List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Aurelien Jarno , Richard Henderson When ext_i32_i64 and extu_i32_i64 ops are not implemented, this means that the register is already properly zero/sign extended, so we can simply replace it by a mov. In practice it means at least one of the two ops should always be implemented on 64-bit targets. Cc: Paolo Bonzini Cc: Richard Henderson Signed-off-by: Aurelien Jarno --- tcg/tcg-op.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index c8db812..b4b1654 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -1775,7 +1775,7 @@ void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg) } else { /* Note: we assume the target supports move between 32 and 64 bit registers. */ - tcg_gen_ext32u_i64(ret, MAKE_TCGV_I64(GET_TCGV_I32(arg))); + tcg_gen_mov_i64(ret, MAKE_TCGV_I64(GET_TCGV_I32(arg))); } } @@ -1790,7 +1790,7 @@ void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg) } else { /* Note: we assume the target supports move between 32 and 64 bit registers. */ - tcg_gen_ext32s_i64(ret, MAKE_TCGV_I64(GET_TCGV_I32(arg))); + tcg_gen_mov_i64(ret, MAKE_TCGV_I64(GET_TCGV_I32(arg))); } } -- 2.1.4