From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52467) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZFeN3-0001aJ-CQ for qemu-devel@nongnu.org; Thu, 16 Jul 2015 04:18:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZFeN0-00070l-Mz for qemu-devel@nongnu.org; Thu, 16 Jul 2015 04:18:21 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:39125) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZFeN0-00070h-H4 for qemu-devel@nongnu.org; Thu, 16 Jul 2015 04:18:18 -0400 Received: from KLMAIL01.kl.imgtec.org (unknown [192.168.5.35]) by Websense Email Security Gateway with ESMTPS id EADEDB40336BF for ; Thu, 16 Jul 2015 09:18:15 +0100 (IST) From: Leon Alrae Date: Thu, 16 Jul 2015 09:17:30 +0100 Message-ID: <1437034657-31026-3-git-send-email-leon.alrae@imgtec.com> In-Reply-To: <1437034657-31026-1-git-send-email-leon.alrae@imgtec.com> References: <1437034657-31026-1-git-send-email-leon.alrae@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain Subject: [Qemu-devel] [PULL 2/9] target-mips: fix to clear MSACSR.Cause List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Yongbok Kim From: Yongbok Kim MSACSR.Cause bits are needed to be cleared before a vector floating-point instructions. FEXDO.df, FEXUPL.df and FEXUPR.df were missed out. Signed-off-by: Yongbok Kim Reviewed-by: Aurelien Jarno Reviewed-by: Leon Alrae Signed-off-by: Leon Alrae --- target-mips/msa_helper.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/target-mips/msa_helper.c b/target-mips/msa_helper.c index 26ffdc7..a1cb48f 100644 --- a/target-mips/msa_helper.c +++ b/target-mips/msa_helper.c @@ -2642,6 +2642,8 @@ void helper_msa_fexdo_df(CPUMIPSState *env, uint32_t df, uint32_t wd, wr_t *pwt = &(env->active_fpu.fpr[wt].wr); uint32_t i; + clear_msacsr_cause(env); + switch (df) { case DF_WORD: for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { @@ -3192,6 +3194,8 @@ void helper_msa_fexupl_df(CPUMIPSState *env, uint32_t df, uint32_t wd, wr_t *pws = &(env->active_fpu.fpr[ws].wr); uint32_t i; + clear_msacsr_cause(env); + switch (df) { case DF_WORD: for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { @@ -3224,6 +3228,8 @@ void helper_msa_fexupr_df(CPUMIPSState *env, uint32_t df, uint32_t wd, wr_t *pws = &(env->active_fpu.fpr[ws].wr); uint32_t i; + clear_msacsr_cause(env); + switch (df) { case DF_WORD: for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { -- 2.1.0