From: Leon Alrae <leon.alrae@imgtec.com>
To: qemu-devel@nongnu.org
Cc: Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PULL 4/9] target-mips: fix ASID synchronisation for MIPS MT
Date: Thu, 16 Jul 2015 09:17:32 +0100 [thread overview]
Message-ID: <1437034657-31026-5-git-send-email-leon.alrae@imgtec.com> (raw)
In-Reply-To: <1437034657-31026-1-git-send-email-leon.alrae@imgtec.com>
From: Aurelien Jarno <aurelien@aurel32.net>
When syncing the task ASID with EntryHi, correctly or the value instead
of assigning it.
Reported-by: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Cc: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
---
target-mips/op_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index 2a9ddff..d457a29 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -661,7 +661,7 @@ static void sync_c0_tcstatus(CPUMIPSState *cpu, int tc,
/* Sync the TASID with EntryHi. */
cpu->CP0_EntryHi &= ~0xff;
- cpu->CP0_EntryHi = tasid;
+ cpu->CP0_EntryHi |= tasid;
compute_hflags(cpu);
}
--
2.1.0
next prev parent reply other threads:[~2015-07-16 8:18 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-16 8:17 [Qemu-devel] [PULL 0/9] target-mips queue Leon Alrae
2015-07-16 8:17 ` [Qemu-devel] [PULL 1/9] target-mips: fix MIPS64R6-generic configuration Leon Alrae
2015-07-16 8:17 ` [Qemu-devel] [PULL 2/9] target-mips: fix to clear MSACSR.Cause Leon Alrae
2015-07-16 8:17 ` [Qemu-devel] [PULL 3/9] disas/mips: fix disassembling R6 instructions Leon Alrae
2015-07-16 8:17 ` Leon Alrae [this message]
2015-07-16 8:17 ` [Qemu-devel] [PULL 5/9] target-mips: correct DERET instruction Leon Alrae
2015-07-16 8:17 ` [Qemu-devel] [PULL 6/9] target-mips: fix logically dead code reported by Coverity Leon Alrae
2015-07-16 8:17 ` [Qemu-devel] [PULL 7/9] target-mips: fix resource leak " Leon Alrae
2015-07-16 8:17 ` [Qemu-devel] [PULL 8/9] linux-user: Fix MIPS N64 trap and break instruction bug Leon Alrae
2015-07-16 8:17 ` [Qemu-devel] [PULL 9/9] target-mips: fix page fault address for LWL/LWR/LDL/LDR Leon Alrae
2015-07-16 10:44 ` [Qemu-devel] [PULL 0/9] target-mips queue Peter Maydell
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