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From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: James Hogan <james.hogan@imgtec.com>,
	Leon Alrae <leon.alrae@imgtec.com>,
	kvm@vger.kernel.org, Aurelien Jarno <aurelien@aurel32.net>,
	qemu-stable@nongnu.org
Subject: [Qemu-devel] [PULL 1/8] mips/kvm: Fix Big endian 32-bit register access
Date: Thu, 16 Jul 2015 20:02:51 +0200	[thread overview]
Message-ID: <1437069778-8954-2-git-send-email-pbonzini@redhat.com> (raw)
In-Reply-To: <1437069778-8954-1-git-send-email-pbonzini@redhat.com>

From: James Hogan <james.hogan@imgtec.com>

Fix access to 32-bit registers on big endian targets. The pointer passed
to the kernel must be for the actual 32-bit value, not a temporary
64-bit value, otherwise on big endian systems the kernel will only
interpret the upper half.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Leon Alrae <leon.alrae@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: kvm@vger.kernel.org
Cc: qemu-stable@nongnu.org
Message-Id: <1429871214-23514-2-git-send-email-james.hogan@imgtec.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 target-mips/kvm.c | 13 +++----------
 1 file changed, 3 insertions(+), 10 deletions(-)

diff --git a/target-mips/kvm.c b/target-mips/kvm.c
index bd64a70..85256f3 100644
--- a/target-mips/kvm.c
+++ b/target-mips/kvm.c
@@ -235,10 +235,9 @@ int kvm_mips_set_ipi_interrupt(MIPSCPU *cpu, int irq, int level)
 static inline int kvm_mips_put_one_reg(CPUState *cs, uint64_t reg_id,
                                        int32_t *addr)
 {
-    uint64_t val64 = *addr;
     struct kvm_one_reg cp0reg = {
         .id = reg_id,
-        .addr = (uintptr_t)&val64
+        .addr = (uintptr_t)addr
     };
 
     return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &cp0reg);
@@ -270,18 +269,12 @@ static inline int kvm_mips_put_one_reg64(CPUState *cs, uint64_t reg_id,
 static inline int kvm_mips_get_one_reg(CPUState *cs, uint64_t reg_id,
                                        int32_t *addr)
 {
-    int ret;
-    uint64_t val64 = 0;
     struct kvm_one_reg cp0reg = {
         .id = reg_id,
-        .addr = (uintptr_t)&val64
+        .addr = (uintptr_t)addr
     };
 
-    ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &cp0reg);
-    if (ret >= 0) {
-        *addr = val64;
-    }
-    return ret;
+    return kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &cp0reg);
 }
 
 static inline int kvm_mips_get_one_ulreg(CPUState *cs, uint64 reg_id,
-- 
2.4.3

  reply	other threads:[~2015-07-16 18:03 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-16 18:02 [Qemu-devel] [PULL v2 0/8] KVM, memory API, crypto, Coverity fixes for 2.4.0-rc1 Paolo Bonzini
2015-07-16 18:02 ` Paolo Bonzini [this message]
2015-07-16 18:02 ` [Qemu-devel] [PULL 2/8] mips/kvm: Sign extend registers written to KVM Paolo Bonzini
2015-07-16 18:02 ` [Qemu-devel] [PULL 3/8] ppc/spapr_drc: fix memory leak Paolo Bonzini
2015-07-16 18:02 ` [Qemu-devel] [PULL 4/8] arm/xlnx-zynqmp: " Paolo Bonzini
2015-07-16 18:02 ` [Qemu-devel] [PULL 5/8] RDMA: Fix error exits Paolo Bonzini
2015-07-16 18:02 ` [Qemu-devel] [PULL 6/8] memory: fix refcount leak in memory_region_present Paolo Bonzini
2015-07-16 18:02 ` [Qemu-devel] [PULL 7/8] crypto: fix build with nettle >= 3.0.0 Paolo Bonzini
2015-07-16 18:02 ` [Qemu-devel] [PULL 8/8] crypto: avoid undefined behavior in nettle calls Paolo Bonzini
2015-07-16 19:30 ` [Qemu-devel] [PULL v2 0/8] KVM, memory API, crypto, Coverity fixes for 2.4.0-rc1 Peter Maydell

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