From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34949) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZHU8Z-0004Tf-Hl for qemu-devel@nongnu.org; Tue, 21 Jul 2015 05:47:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZHU8V-000432-HX for qemu-devel@nongnu.org; Tue, 21 Jul 2015 05:46:59 -0400 Message-ID: <1437471990.5809.7.camel@kernel.crashing.org> From: Benjamin Herrenschmidt Date: Tue, 21 Jul 2015 19:46:30 +1000 In-Reply-To: <55ADE936.8090407@twiddle.net> References: <1437455978.5809.2.camel@kernel.crashing.org> <55ADE64A.7050702@twiddle.net> <1437460396.5809.5.camel@kernel.crashing.org> <55ADE936.8090407@twiddle.net> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v3] tcg/ppc: Improve unaligned load/store handling on 64-bit backend List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson Cc: Paolo Bonzini , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Aurelien Jarno , Alexander Graf On Tue, 2015-07-21 at 07:39 +0100, Richard Henderson wrote: > On 07/21/2015 07:33 AM, Benjamin Herrenschmidt wrote: > > On Tue, 2015-07-21 at 07:27 +0100, Richard Henderson wrote: > >> On 07/21/2015 06:19 AM, Benjamin Herrenschmidt wrote: > >>> + /* Clear the non-page, non-alignment bits from the address */ > >>> if (TCG_TARGET_REG_BITS == 32 || TARGET_LONG_BITS == 32) { > >>> + /* We don't support unaligned accesses on 32-bits, preserve > >>> + * the bottom bits and thus trigger a comparison failure on > >>> + * unaligned accesses > >>> + */ > >>> tcg_out_rlw(s, RLWINM, TCG_REG_R0, addrlo, 0, > >>> (32 - s_bits) & 31, 31 - TARGET_PAGE_BITS); > >> > >> Why don't you support this unaligned acess with 32-bit guests? > > > > No reason, I just didn't get to do it yet. It's possible, I was just > > lazy :-) It also adds one instruction. On 64-bit we always have 2 > > instructions anyway so it wasn't adding any overhead really, on 32-bit > > we get away with a single rlwinm, while adding the unaligned support > > would make it an addi + rlwinm. > > Ah, ok. I wondered if some older 32-bit host ppc didn't allow it, and the > 32-bit guest paid the price. Anyway, No, most implementations support unaligned accesses in common cases. I think the worst embedded variants might trap when crossing page boundaries but that's about it. I don't think we bother emulating this though. > Reviewed-by: Richard Henderson Thanks. Cheers, Ben. > > r~