* [Qemu-devel] [PULL 1/2] target-arm: kvm: Differentiate registers based on write-back levels
2015-07-21 11:17 [Qemu-devel] [PULL 0/2] target-arm queue Peter Maydell
@ 2015-07-21 11:17 ` Peter Maydell
2015-07-21 11:17 ` [Qemu-devel] [PULL 2/2] disas/arm-a64: Add missing compiler attribute GCC_FMT_ATTR Peter Maydell
2015-07-21 13:14 ` [Qemu-devel] [PULL 0/2] target-arm queue Peter Maydell
2 siblings, 0 replies; 4+ messages in thread
From: Peter Maydell @ 2015-07-21 11:17 UTC (permalink / raw)
To: qemu-devel
From: Christoffer Dall <christoffer.dall@linaro.org>
Some registers like the CNTVCT register should only be written to the
kernel as part of machine initialization or on vmload operations, but
never during runtime, as this can potentially make time go backwards or
create inconsistent time observations between VCPUs.
Introduce a list of registers that should not be written back at runtime
and check this list on syncing the register state to the KVM state.
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Message-id: 1437046488-10773-1-git-send-email-christoffer.dall@linaro.org
[PMM: tweaked a few comments, added the new argument to the stub
write_list_to_kvmstate() in target-arm/kvm-stub.c]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/kvm-stub.c | 2 +-
target-arm/kvm.c | 6 +++++-
target-arm/kvm32.c | 30 +++++++++++++++++++++++++++++-
target-arm/kvm64.c | 30 +++++++++++++++++++++++++++++-
target-arm/kvm_arm.h | 12 +++++++++++-
target-arm/machine.c | 2 +-
6 files changed, 76 insertions(+), 6 deletions(-)
diff --git a/target-arm/kvm-stub.c b/target-arm/kvm-stub.c
index cd1849f..db2edc2 100644
--- a/target-arm/kvm-stub.c
+++ b/target-arm/kvm-stub.c
@@ -17,7 +17,7 @@ bool write_kvmstate_to_list(ARMCPU *cpu)
abort();
}
-bool write_list_to_kvmstate(ARMCPU *cpu)
+bool write_list_to_kvmstate(ARMCPU *cpu, int level)
{
abort();
}
diff --git a/target-arm/kvm.c b/target-arm/kvm.c
index 548bfd7..b278542 100644
--- a/target-arm/kvm.c
+++ b/target-arm/kvm.c
@@ -409,7 +409,7 @@ bool write_kvmstate_to_list(ARMCPU *cpu)
return ok;
}
-bool write_list_to_kvmstate(ARMCPU *cpu)
+bool write_list_to_kvmstate(ARMCPU *cpu, int level)
{
CPUState *cs = CPU(cpu);
int i;
@@ -421,6 +421,10 @@ bool write_list_to_kvmstate(ARMCPU *cpu)
uint32_t v32;
int ret;
+ if (kvm_arm_cpreg_level(regidx) > level) {
+ continue;
+ }
+
r.id = regidx;
switch (regidx & KVM_REG_SIZE_MASK) {
case KVM_REG_SIZE_U32:
diff --git a/target-arm/kvm32.c b/target-arm/kvm32.c
index d7e7d68..421ce0e 100644
--- a/target-arm/kvm32.c
+++ b/target-arm/kvm32.c
@@ -153,6 +153,34 @@ bool kvm_arm_reg_syncs_via_cpreg_list(uint64_t regidx)
}
}
+typedef struct CPRegStateLevel {
+ uint64_t regidx;
+ int level;
+} CPRegStateLevel;
+
+/* All coprocessor registers not listed in the following table are assumed to
+ * be of the level KVM_PUT_RUNTIME_STATE. If a register should be written less
+ * often, you must add it to this table with a state of either
+ * KVM_PUT_RESET_STATE or KVM_PUT_FULL_STATE.
+ */
+static const CPRegStateLevel non_runtime_cpregs[] = {
+ { KVM_REG_ARM_TIMER_CNT, KVM_PUT_FULL_STATE },
+};
+
+int kvm_arm_cpreg_level(uint64_t regidx)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(non_runtime_cpregs); i++) {
+ const CPRegStateLevel *l = &non_runtime_cpregs[i];
+ if (l->regidx == regidx) {
+ return l->level;
+ }
+ }
+
+ return KVM_PUT_RUNTIME_STATE;
+}
+
#define ARM_MPIDR_HWID_BITMASK 0xFFFFFF
#define ARM_CPU_ID_MPIDR 0, 0, 0, 5
@@ -367,7 +395,7 @@ int kvm_arch_put_registers(CPUState *cs, int level)
* managed to update the CPUARMState with, and only allowing those
* to be written back up into the kernel).
*/
- if (!write_list_to_kvmstate(cpu)) {
+ if (!write_list_to_kvmstate(cpu, level)) {
return EINVAL;
}
diff --git a/target-arm/kvm64.c b/target-arm/kvm64.c
index ac34f51..bd60889 100644
--- a/target-arm/kvm64.c
+++ b/target-arm/kvm64.c
@@ -139,6 +139,34 @@ bool kvm_arm_reg_syncs_via_cpreg_list(uint64_t regidx)
}
}
+typedef struct CPRegStateLevel {
+ uint64_t regidx;
+ int level;
+} CPRegStateLevel;
+
+/* All system registers not listed in the following table are assumed to be
+ * of the level KVM_PUT_RUNTIME_STATE. If a register should be written less
+ * often, you must add it to this table with a state of either
+ * KVM_PUT_RESET_STATE or KVM_PUT_FULL_STATE.
+ */
+static const CPRegStateLevel non_runtime_cpregs[] = {
+ { KVM_REG_ARM_TIMER_CNT, KVM_PUT_FULL_STATE },
+};
+
+int kvm_arm_cpreg_level(uint64_t regidx)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(non_runtime_cpregs); i++) {
+ const CPRegStateLevel *l = &non_runtime_cpregs[i];
+ if (l->regidx == regidx) {
+ return l->level;
+ }
+ }
+
+ return KVM_PUT_RUNTIME_STATE;
+}
+
#define AARCH64_CORE_REG(x) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \
KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(x))
@@ -280,7 +308,7 @@ int kvm_arch_put_registers(CPUState *cs, int level)
return ret;
}
- if (!write_list_to_kvmstate(cpu)) {
+ if (!write_list_to_kvmstate(cpu, level)) {
return EINVAL;
}
diff --git a/target-arm/kvm_arm.h b/target-arm/kvm_arm.h
index 5abd591..7912d74 100644
--- a/target-arm/kvm_arm.h
+++ b/target-arm/kvm_arm.h
@@ -69,8 +69,18 @@ int kvm_arm_init_cpreg_list(ARMCPU *cpu);
bool kvm_arm_reg_syncs_via_cpreg_list(uint64_t regidx);
/**
+ * kvm_arm_cpreg_level
+ * regidx: KVM register index
+ *
+ * Return the level of this coprocessor/system register. Return value is
+ * either KVM_PUT_RUNTIME_STATE, KVM_PUT_RESET_STATE, or KVM_PUT_FULL_STATE.
+ */
+int kvm_arm_cpreg_level(uint64_t regidx);
+
+/**
* write_list_to_kvmstate:
* @cpu: ARMCPU
+ * @level: the state level to sync
*
* For each register listed in the ARMCPU cpreg_indexes list, write
* its value from the cpreg_values list into the kernel (via ioctl).
@@ -83,7 +93,7 @@ bool kvm_arm_reg_syncs_via_cpreg_list(uint64_t regidx);
* Note that we do not stop early on failure -- we will attempt
* writing all registers in the list.
*/
-bool write_list_to_kvmstate(ARMCPU *cpu);
+bool write_list_to_kvmstate(ARMCPU *cpu, int level);
/**
* write_kvmstate_to_list:
diff --git a/target-arm/machine.c b/target-arm/machine.c
index 9eb51df..32adfe7 100644
--- a/target-arm/machine.c
+++ b/target-arm/machine.c
@@ -251,7 +251,7 @@ static int cpu_post_load(void *opaque, int version_id)
}
if (kvm_enabled()) {
- if (!write_list_to_kvmstate(cpu)) {
+ if (!write_list_to_kvmstate(cpu, KVM_PUT_FULL_STATE)) {
return -1;
}
/* Note that it's OK for the TCG side not to know about
--
1.9.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* [Qemu-devel] [PULL 2/2] disas/arm-a64: Add missing compiler attribute GCC_FMT_ATTR
2015-07-21 11:17 [Qemu-devel] [PULL 0/2] target-arm queue Peter Maydell
2015-07-21 11:17 ` [Qemu-devel] [PULL 1/2] target-arm: kvm: Differentiate registers based on write-back levels Peter Maydell
@ 2015-07-21 11:17 ` Peter Maydell
2015-07-21 13:14 ` [Qemu-devel] [PULL 0/2] target-arm queue Peter Maydell
2 siblings, 0 replies; 4+ messages in thread
From: Peter Maydell @ 2015-07-21 11:17 UTC (permalink / raw)
To: qemu-devel
From: Stefan Weil <sw@weilnetz.de>
Type fprintf_function which fits here was defined with this attribute.
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1437208027-14584-1-git-send-email-sw@weilnetz.de
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
disas/arm-a64.cc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/disas/arm-a64.cc b/disas/arm-a64.cc
index b0803f9..b57256b 100644
--- a/disas/arm-a64.cc
+++ b/disas/arm-a64.cc
@@ -42,7 +42,7 @@ public:
stream_ = stream;
}
- void SetPrintf(int (*printf_fn)(FILE *, const char *, ...)) {
+ void SetPrintf(fprintf_function printf_fn) {
printf_ = printf_fn;
}
@@ -53,7 +53,7 @@ protected:
}
private:
- int (*printf_)(FILE *, const char *, ...);
+ fprintf_function printf_;
FILE *stream_;
};
--
1.9.1
^ permalink raw reply related [flat|nested] 4+ messages in thread