From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Claudio Fontana <claudio.fontana@huawei.com>,
Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PATCH] tcg/aarch64: use 32-bit offset for 32-bit softmmu emulation
Date: Thu, 23 Jul 2015 15:14:00 -0700 [thread overview]
Message-ID: <1437689640-31364-1-git-send-email-rth@twiddle.net> (raw)
Similar to the same fix for user-mode, except this instance
ocurrs on the softmmu path. Again, the softmmu addend must
be the base register, while the guest address is the index.
Cc: Claudio Fontana <claudio.fontana@huawei.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
While applying Paolo's fix for user-mode, I noticed this.
I've never seen this fail, but obviously what we have is wrong.
This patch depends on Paolo's cleanup.
r~
---
tcg/aarch64/tcg-target.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/tcg/aarch64/tcg-target.c b/tcg/aarch64/tcg-target.c
index 4aca883..b7ec4f5 100644
--- a/tcg/aarch64/tcg-target.c
+++ b/tcg/aarch64/tcg-target.c
@@ -1204,18 +1204,18 @@ static void tcg_out_qemu_ld(TCGContext *s, TCGReg data_reg, TCGReg addr_reg,
TCGMemOpIdx oi, TCGType ext)
{
TCGMemOp memop = get_memop(oi);
+ const TCGType otype = TARGET_LONG_BITS == 64 ? TCG_TYPE_I64 : TCG_TYPE_I32;
#ifdef CONFIG_SOFTMMU
unsigned mem_index = get_mmuidx(oi);
TCGMemOp s_bits = memop & MO_SIZE;
tcg_insn_unit *label_ptr;
tcg_out_tlb_read(s, addr_reg, s_bits, &label_ptr, mem_index, 1);
- tcg_out_qemu_ld_direct(s, memop, ext, data_reg, addr_reg,
- TCG_TYPE_I64, TCG_REG_X1);
+ tcg_out_qemu_ld_direct(s, memop, ext, data_reg,
+ TCG_REG_X1, otype, addr_reg);
add_qemu_ldst_label(s, true, oi, ext, data_reg, addr_reg,
s->code_ptr, label_ptr);
#else /* !CONFIG_SOFTMMU */
- const TCGType otype = TARGET_LONG_BITS == 64 ? TCG_TYPE_I64 : TCG_TYPE_I32;
tcg_out_qemu_ld_direct(s, memop, ext, data_reg,
GUEST_BASE ? TCG_REG_GUEST_BASE : TCG_REG_XZR,
otype, addr_reg);
@@ -1226,18 +1226,18 @@ static void tcg_out_qemu_st(TCGContext *s, TCGReg data_reg, TCGReg addr_reg,
TCGMemOpIdx oi)
{
TCGMemOp memop = get_memop(oi);
+ const TCGType otype = TARGET_LONG_BITS == 64 ? TCG_TYPE_I64 : TCG_TYPE_I32;
#ifdef CONFIG_SOFTMMU
unsigned mem_index = get_mmuidx(oi);
TCGMemOp s_bits = memop & MO_SIZE;
tcg_insn_unit *label_ptr;
tcg_out_tlb_read(s, addr_reg, s_bits, &label_ptr, mem_index, 0);
- tcg_out_qemu_st_direct(s, memop, data_reg, addr_reg,
- TCG_TYPE_I64, TCG_REG_X1);
+ tcg_out_qemu_st_direct(s, memop, data_reg,
+ TCG_REG_X1, otype, addr_reg);
add_qemu_ldst_label(s, false, oi, s_bits == MO_64, data_reg, addr_reg,
s->code_ptr, label_ptr);
#else /* !CONFIG_SOFTMMU */
- const TCGType otype = TARGET_LONG_BITS == 64 ? TCG_TYPE_I64 : TCG_TYPE_I32;
tcg_out_qemu_st_direct(s, memop, data_reg,
GUEST_BASE ? TCG_REG_GUEST_BASE : TCG_REG_XZR,
otype, addr_reg);
--
2.4.3
next reply other threads:[~2015-07-23 22:14 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-23 22:14 Richard Henderson [this message]
2015-07-23 22:21 ` [Qemu-devel] [PATCH] tcg/aarch64: use 32-bit offset for 32-bit softmmu emulation Aurelien Jarno
2015-07-23 22:27 ` Eric Blake
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